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[Qemu-arm] [PATCH v2 0/8] arm: Steps towards EL2 support round 6

From: Edgar E. Iglesias
Subject: [Qemu-arm] [PATCH v2 0/8] arm: Steps towards EL2 support round 6
Date: Fri, 19 Feb 2016 21:04:44 +0100

From: "Edgar E. Iglesias" <address@hidden>


Another round of patches towards EL2 support. This one adds partial
Instruction Syndrome generation for Data Aborts while running in AArch64.

I don't feel very confident with the way I collect the regsize info used
to fill out the SF field. Feedback on that would be great.

Once we sort out the details on how this should be implemented we can
fill out the parts needed for AArch32. Possibly in a future version of
this same series.

Comments welcome!

Best regards,


v1 -> v2:
* Reworked the syndrome generation code to reuse syn_data_abort for
  the encoding.
* Reworded a bunch of comments.
* Fixed thumb vs 16bit IL field issue.

Edgar E. Iglesias (8):
  tcg: Add tcg_set_insn_param
  gen-icount: Use tcg_set_insn_param
  target-arm: Add the IL flag to syn_data_abort
  target-arm: Add more fields to the data abort syndrome generator
  target-arm/translate-a64.c: Use extract32 in disas_ldst_reg_imm9
  target-arm/translate-a64.c: Unify some of the ldst_reg decoding
  target-arm: A64: Create Instruction Syndromes for Data Aborts
  target-arm: Use isyn.swstep.ex to hold the is_ldex state

 include/exec/gen-icount.h  |  16 +++---
 target-arm/cpu.h           |   2 +-
 target-arm/internals.h     |  24 +++++++--
 target-arm/op_helper.c     |  41 +++++++++++++--
 target-arm/translate-a64.c | 123 ++++++++++++++++++++++++++++++++++++---------
 target-arm/translate.c     |  11 ++--
 target-arm/translate.h     |  27 ++++++++--
 tcg/tcg.h                  |   6 +++
 8 files changed, 201 insertions(+), 49 deletions(-)


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