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[Qemu-arm] [PATCH 1/2] target-arm: Set IL bit in syndromes for insn abor
From: |
Peter Maydell |
Subject: |
[Qemu-arm] [PATCH 1/2] target-arm: Set IL bit in syndromes for insn abort, watchpoint, swstep |
Date: |
Tue, 17 May 2016 13:14:17 +0100 |
For some exception syndrome types, the IL bit should always be set.
This includes the instruction abort, watchpoint and software step
syndrome types; add the missing ARM_EL_IL bit to the syndrome
values returned by syn_insn_abort(), syn_swstep() and syn_watchpoint().
Signed-off-by: Peter Maydell <address@hidden>
---
target-arm/internals.h | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/target-arm/internals.h b/target-arm/internals.h
index 54a0fb1..7768a24 100644
--- a/target-arm/internals.h
+++ b/target-arm/internals.h
@@ -382,7 +382,7 @@ static inline uint32_t syn_fp_access_trap(int cv, int cond,
bool is_16bit)
static inline uint32_t syn_insn_abort(int same_el, int ea, int s1ptw, int fsc)
{
return (EC_INSNABORT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
- | (ea << 9) | (s1ptw << 7) | fsc;
+ | ARM_EL_IL | (ea << 9) | (s1ptw << 7) | fsc;
}
static inline uint32_t syn_data_abort_no_iss(int same_el,
@@ -411,13 +411,13 @@ static inline uint32_t syn_data_abort_with_iss(int
same_el,
static inline uint32_t syn_swstep(int same_el, int isv, int ex)
{
return (EC_SOFTWARESTEP << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
- | (isv << 24) | (ex << 6) | 0x22;
+ | ARM_EL_IL | (isv << 24) | (ex << 6) | 0x22;
}
static inline uint32_t syn_watchpoint(int same_el, int cm, int wnr)
{
return (EC_WATCHPOINT << ARM_EL_EC_SHIFT) | (same_el << ARM_EL_EC_SHIFT)
- | (cm << 8) | (wnr << 6) | 0x22;
+ | ARM_EL_IL | (cm << 8) | (wnr << 6) | 0x22;
}
static inline uint32_t syn_breakpoint(int same_el)
--
1.9.1