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Re: [Qemu-arm] [Qemu-devel] [PATCH v2 06/22] hw/intc/arm_gicv3: Add stat
From: |
Shannon Zhao |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH v2 06/22] hw/intc/arm_gicv3: Add state information |
Date: |
Tue, 7 Jun 2016 15:51:51 +0800 |
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Mozilla/5.0 (Windows NT 6.1; rv:24.0) Gecko/20100101 Thunderbird/24.4.0 |
On 2016/5/26 22:55, Peter Maydell wrote:
> From: Pavel Fedin <address@hidden>
>
> Add state information to GICv3 object structure and implement
> arm_gicv3_common_reset().
>
> This commit includes accessor functions for the fields which are
> stored as bitmaps in uint32_t arrays.
>
> Signed-off-by: Pavel Fedin <address@hidden>
> [PMM: significantly overhauled:
> * Add missing qom/cpu.h include
> * Remove legacy-only state fields (we can add them later if/when we add
> legacy emulation)
> * Use arrays of uint32_t to store the various distributor bitmaps,
> and provide accessor functions for the various set/test/etc operations
> * Add various missing register offset #defines
> * Accessor macros which combine distributor and redistributor behaviour
> removed
> * Fields in state structures renamed to match architectural register names
> * Corrected the reset value for GICR_IENABLER0 since we don't support
> legacy mode
> * Added ARM_LINUX_BOOT_IF interface for "we are directly booting a kernel in
> non-secure" so that we can fake up the firmware-mandated reconfiguration
> only when we need it
> ]
> Signed-off-by: Peter Maydell <address@hidden>
[...]
> +#define GIC_BIT_MASK(nr) (1U << ((nr) % 32))
> +#define GIC_BIT_WORD(nr) ((nr) / 32)
> +#define GIC_BIT(nr) (1U << (nr))
It seems the GIC_BIT(nr) is not used.
Reviewed-by: Shannon Zhao <address@hidden>
--
Shannon
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