|Subject:||[Qemu-arm] Expensive emulation of CPU condition flags|
|Date:||Thu, 30 Jun 2016 18:13:56 +0000|
In running an ARMv7 guest on an x86 host, we observed that a guest instruction affecting condition flags is often translated into 10+ host instructions. The reason seems to be the way that the frontend emulates the condition flags. For instance:
Target ARM instruction:
cmp r9, 0x21 ;
Host x86 instruction:
Imaging in a tight loop where a cmp instruction is used to compute the termination condition, this can be pretty expensive. And lazy evaluation seems not to help here.
We wonder if there exists any optimization, e.g., directly mapping the frontend flags to that of the backend? Any suggestions are appreciated.
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