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Re: [Qemu-arm] [RFC PATCH v2 2/2] hw/intc/arm_gicv3_kvm: Implement get/p
From: |
Vijay Kilari |
Subject: |
Re: [Qemu-arm] [RFC PATCH v2 2/2] hw/intc/arm_gicv3_kvm: Implement get/put functions |
Date: |
Tue, 9 Aug 2016 12:22:30 +0530 |
On Mon, Aug 8, 2016 at 10:27 PM, Peter Maydell <address@hidden> wrote:
> On 8 August 2016 at 17:51, <address@hidden> wrote:
>> From: Vijaya Kumar K <address@hidden>
>>
>> This actually implements pre_save and post_load methods for in-kernel
>> vGICv3.
>>
>> Signed-off-by: Pavel Fedin <address@hidden>
>> Signed-off-by: Peter Maydell <address@hidden>
>> [PMM:
>> * use decimal, not 0bnnn
>> * fixed typo in names of ICC_APR0R_EL1 and ICC_AP1R_EL1
>> * completely rearranged the get and put functions to read and write
>> the state in a natural order, rather than mixing distributor and
>> redistributor state together]
>> Signed-off-by: Vijaya Kumar K <address@hidden>
>> [Vijay:
>> * Update macro KVM_VGIC_ATTR
>> * Use 32 bit access for gicd and gicr
>> * GICD_IROUTER, GICD_TYPER, GICR_PROPBASER and GICR_PENDBASER reg
>> access are changed from 64-bit to 32-bit access]
>> ---
>
>> + // TODO: there is no kernel API for reading/writing c->level
>
> We have now defined this API so this code should use it.
You mean storing and restoring of irq->line_level of kernel?.
I don't see any API defined in new vgic to read line level.
The irq pending information is updated when line_level is changed in
kernel. Hence pending (ispendr) holds information of pending status
of interrupt. Do you see line level is still required to save & restore?
>
>> + // TODO: there is no kernel API for reading/writing s->level
>
> Also here (and similarly in the _get function).
>
> thanks
> -- PMM