[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: [Qemu-arm] [PATCH 0/3] preliminaries for GICv3 virt support

From: Edgar E. Iglesias
Subject: Re: [Qemu-arm] [PATCH 0/3] preliminaries for GICv3 virt support
Date: Thu, 6 Oct 2016 18:59:21 +0200
User-agent: Mutt/1.5.24 (2015-08-30)

On Thu, Oct 06, 2016 at 02:21:04PM +0100, Peter Maydell wrote:
> This set of three straightforward patches is a preliminary
> for adding virtualization support to the GICv3 emulation:
>  * add a (nop implementation of) MDCCINT_EL1, since KVM
>    will read/write it on worldswitch
>  * fix some bugs in the GICv3 trace events
>  * add trace events for the generic timers
>    (which I have been using for debugging)
> I actually have almost all of the GICv3 virt code written,
> but it currently has bugs which mean that a guest kernel
> under KVM won't boot. Debugging in progress...

That is very cool, we could soon enable EL2 :-)

What kind of issues are you seeing?

FWIW with our out of tree GICv2 virt models we've got issues
with SMP Xen were things go nuts some times with virtual
timer interrupts. Some times they take for ever to hit,
like if we loose events.

Last time I looked at it, I noticed that our GICv2 virt
implementation of the APR regs and EOIR stuff seems totally
bogus (my bad).


> thanks
> -- PMM
> Peter Maydell (3):
>   target-arm: Implement dummy MDCCINT_EL1
>   target-arm: Add trace events for the generic timers
>   hw/intc/arm_gicv3: Fix ICC register tracepoints
>  Makefile.objs             |  1 +
>  hw/intc/arm_gicv3_cpuif.c | 23 +++++++++++++++--------
>  hw/intc/trace-events      | 14 +++++++-------
>  target-arm/helper.c       | 28 ++++++++++++++++++++++++----
>  4 files changed, 47 insertions(+), 19 deletions(-)
> -- 
> 2.7.4

reply via email to

[Prev in Thread] Current Thread [Next in Thread]