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Re: [Qemu-arm] [PATCH] target-arm/translate.c: fix movs pc, lr exception

From: Peter Maydell
Subject: Re: [Qemu-arm] [PATCH] target-arm/translate.c: fix movs pc, lr exception return on ARMv7
Date: Fri, 14 Oct 2016 18:43:14 +0100

On 14 October 2016 at 16:13, Alex Bennée <address@hidden> wrote:
> This was broken by the fix for 9b6a3ea7a699594162ed3d11e4e04b98568dc5c0.
> Specifically a movs pc,lr in the kernels ret_fast_syscall returning to
> some thumb mode user space code but store_reg unconditionally aligned
> the return PC instead of treating the return as an "interworking"
> branch.
> I suspect we need to audit all calls to store_reg that might involve the
> PC to ensure "interworking" branches are correctly handled. Also I'm not
> quite sure how the code worked before 9b6a3e as the store_reg path
> wouldn't have triggered the store_cpu_field(var, thumb) to set the
> processor mode back to thumb.
> Signed-off-by: Alex Bennée <address@hidden>

I think this is the wrong fix to the problem -- see the
patch I sent a few days back.

-- PMM

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