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[Qemu-arm] [PATCH v2 03/13] tcg: enforce 64-byte alignment of TCGContext
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From: |
Emilio G. Cota |
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Subject: |
[Qemu-arm] [PATCH v2 03/13] tcg: enforce 64-byte alignment of TCGContext |
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Date: |
Tue, 25 Apr 2017 03:53:49 -0400 |
This will allow us to prevent cache line false sharing in TCGContext.
Before:
$ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx
00000000003ea820 g O .bss 00000000000152d8 tcg_ctx
After:
$ objdump -t build/x86_64-linux-user/qemu-x86_64 | grep tcg_ctx
00000000003ea880 g O .bss 0000000000015300 tcg_ctx
Signed-off-by: Emilio G. Cota <address@hidden>
---
tcg/tcg.h | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/tcg/tcg.h b/tcg/tcg.h
index 6c216bb..5fdbfe3 100644
--- a/tcg/tcg.h
+++ b/tcg/tcg.h
@@ -727,7 +727,7 @@ struct TCGContext {
uint16_t gen_insn_end_off[TCG_MAX_INSNS];
target_ulong gen_insn_data[TCG_MAX_INSNS][TARGET_INSN_START_WORDS];
-};
+} QEMU_ALIGNED(64);
extern TCGContext tcg_ctx;
extern bool parallel_cpus;
--
2.7.4
- [Qemu-arm] [PATCH v2 00/13] TCG optimizations for 2.10, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 01/13] exec-all: add tb_from_jmp_cache, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 02/13] exec-all: inline tb_from_jmp_cache, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 03/13] tcg: enforce 64-byte alignment of TCGContext,
Emilio G. Cota <=
- [Qemu-arm] [PATCH v2 07/13] tcg/i386: implement goto_ptr op, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 08/13] target/arm: optimize cross-page block chaining in softmmu, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 10/13] target/i386: introduce gen_jr() helper to jump to register, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 09/13] target/arm: optimize indirect branches with TCG's goto_ptr, Emilio G. Cota, 2017/04/25
- [Qemu-arm] [PATCH v2 06/13] tcg: add goto_ptr opcode, Emilio G. Cota, 2017/04/25