[Qemu-arm] Qemu interrupt handling latency

[Dong-In Kang]

 

Hi,

 

I am trying to get rough estimate of Qemu overhead of interrupt handling over the baremetal on aarch64 architecture.

It doesn’t have to be accurate – for example, a few hundred instructions or cycles is OK.

As I know, when an interrupt is pending, Qemu stops block chaining and runs epilog and returns to the host.

Then, I could not find a proper document what are done for actual interrupt handling.

I guess it needs some work at the host and then runns another prolog and actual interrupt handling routine and epilog.

It my guess is correct, the extra latency of Qemu would be

(the execution time of the remaining instructions in the current translation block + epilog + host code for finding the code for interrupt handling + prolog).
Can someone tell me if it is correct and/or how much overhead of them would be in terms of rough number of instructions or cycles?

 

Thanks,

David