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[Qemu-arm] [PATCH v11 11/17] target/arm/kvm: Translate the MSI doorbell
From: |
Eric Auger |
Subject: |
[Qemu-arm] [PATCH v11 11/17] target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route |
Date: |
Thu, 12 Apr 2018 09:38:02 +0200 |
In case the MSI is translated by an IOMMU we need to fixup the
MSI route with the translated address.
Signed-off-by: Eric Auger <address@hidden>
Signed-off-by: Bharat Bhushan <address@hidden>
---
v9 -> v10:
- use address_space_translate
v5 -> v6:
- use IOMMUMemoryRegionClass API
---
target/arm/kvm.c | 27 +++++++++++++++++++++++++++
target/arm/trace-events | 3 +++
2 files changed, 30 insertions(+)
diff --git a/target/arm/kvm.c b/target/arm/kvm.c
index ecc39ac..c6f6aa8 100644
--- a/target/arm/kvm.c
+++ b/target/arm/kvm.c
@@ -20,8 +20,10 @@
#include "sysemu/kvm.h"
#include "kvm_arm.h"
#include "cpu.h"
+#include "trace.h"
#include "internals.h"
#include "hw/arm/arm.h"
+#include "hw/pci/pci.h"
#include "exec/memattrs.h"
#include "exec/address-spaces.h"
#include "hw/boards.h"
@@ -649,6 +651,31 @@ int kvm_arm_vgic_probe(void)
int kvm_arch_fixup_msi_route(struct kvm_irq_routing_entry *route,
uint64_t address, uint32_t data, PCIDevice *dev)
{
+ AddressSpace *as = pci_device_iommu_address_space(dev);
+ hwaddr xlat, len, doorbell_gpa;
+ MemoryRegionSection mrs;
+ MemoryRegion *mr;
+
+ if (as == &address_space_memory) {
+ return 0;
+ }
+
+ /* MSI doorbell address is translated by an IOMMU */
+
+ rcu_read_lock();
+ mr = address_space_translate(as, address, &xlat, &len, true);
+ if (!mr) {
+ return 1;
+ }
+ mrs = memory_region_find(mr, xlat, 0);
+ doorbell_gpa = mrs.offset_within_address_space;
+ rcu_read_unlock();
+
+ route->u.msi.address_lo = doorbell_gpa;
+ route->u.msi.address_hi = doorbell_gpa >> 32;
+
+ trace_kvm_arm_fixup_msi_route(address, doorbell_gpa);
+
return 0;
}
diff --git a/target/arm/trace-events b/target/arm/trace-events
index 9e37131..6b759f9 100644
--- a/target/arm/trace-events
+++ b/target/arm/trace-events
@@ -8,3 +8,6 @@ arm_gt_tval_write(int timer, uint64_t value) "gt_tval_write:
timer %d value 0x%"
arm_gt_ctl_write(int timer, uint64_t value) "gt_ctl_write: timer %d value 0x%"
PRIx64
arm_gt_imask_toggle(int timer, int irqstate) "gt_ctl_write: timer %d IMASK
toggle, new irqstate %d"
arm_gt_cntvoff_write(uint64_t value) "gt_cntvoff_write: value 0x%" PRIx64
+
+# target/arm/kvm.c
+kvm_arm_fixup_msi_route(uint64_t iova, uint64_t gpa) "MSI iova = 0x%"PRIx64"
is translated into 0x%"PRIx64
--
2.5.5
- Re: [Qemu-arm] [PATCH v11 07/17] hw/arm/smmuv3: Implement MMIO write operations, (continued)
- [Qemu-arm] [PATCH v11 06/17] hw/arm/smmuv3: Queue helpers, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 08/17] hw/arm/smmuv3: Event queue recording helper, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 09/17] hw/arm/smmuv3: Implement translate callback, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 10/17] hw/arm/smmuv3: Abort on vfio or vhost case, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 11/17] target/arm/kvm: Translate the MSI doorbell in kvm_arch_fixup_msi_route,
Eric Auger <=
- [Qemu-arm] [PATCH v11 12/17] hw/arm/virt: Add SMMUv3 to the virt board, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 13/17] hw/arm/virt-acpi-build: Add smmuv3 node in IORT table, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 14/17] hw/arm/virt: Introduce the iommu option, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 15/17] hw/arm/smmuv3: Cache/invalidate config data, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 17/17] hw/arm/smmuv3: Add notifications on invalidation, Eric Auger, 2018/04/12
- [Qemu-arm] [PATCH v11 16/17] hw/arm/smmuv3: IOTLB emulation, Eric Auger, 2018/04/12