Re: [Qemu-arm] [PATCH 0/7] arm: aspeed: Extend SDRAM controller

[Cédric Le Goater]

On 08/07/2018 09:57 AM, Joel Stanley wrote:
> This series allow us to run upstream u-boot on the ast2500-evb model.
> They have been tested with upstream u-boot, as well as openbmc's ast2500
> and ast2500 images.

For all patches,

Tested-by: Cédric Le Goater <address@hidden>

Patch [1-6] are good to merge. 

I think patch 7 is a good start. It enables support for mainline 
U-Boot that we can use to develop more U-Boot drivers (flash). 
But the device reset model needs a little more work to take into 
account the Reset Mask Register of the watchdog. 

We don't have to support all of them, only the SoC and SDRAM to 
start with.

Thanks,

C.

> 
> Cédric Le Goater (1):
>   aspeed: add a max_ram_size property to the memory controller
> 
> Joel Stanley (6):
>   aspeed_sdmc: Extend number of valid registers
>   aspeed_sdmc: Fix saved values
>   aspeed_sdmc: Set 'cache initial sequence' always true
>   aspeed_sdmc: Init status alwlays idle
>   aspeed_sdmc: Handle ECC training
>   aspeed: Link SCU to the watchdog
> 
>  hw/arm/aspeed.c                  | 31 ++++++++++++++++++
>  hw/arm/aspeed_soc.c              |  4 +++
>  hw/misc/aspeed_sdmc.c            | 55 +++++++++++++++++++++-----------
>  hw/watchdog/wdt_aspeed.c         | 20 ++++++++++++
>  include/hw/misc/aspeed_sdmc.h    |  4 ++-
>  include/hw/watchdog/wdt_aspeed.h |  1 +
>  6 files changed, 95 insertions(+), 20 deletions(-)
>