Re: [Qemu-arm] [PATCH v2 00/11] aspeed: misc fixes and enhancements (SMC)

[Cédric Le Goater]

On 10/2/18 12:57 PM, Peter Maydell wrote:
> On 25 September 2018 at 15:10, Cédric Le Goater <address@hidden> wrote:
>> On 9/25/18 2:20 PM, Peter Maydell wrote:
>>> On 21 September 2018 at 17:19, Cédric Le Goater <address@hidden> wrote:
>>>> Hello,
>>>>
>>>> This series adds a couple of cleanups and two main features to the
>>>> SMC controller of the Aspeed machines :
>>>>
>>>>  - a 'execute-in-place' property to boot directly from a memory region
>>>>    alias of the FMC flash module using MMIO execution. This is not
>>>>    activated by default because boot time needs to be improved on
>>>>    recent firmwares. It also breaks migration compatibility.
>>>>
>>>>  - support for DMA to access the flash modules. Our primary need is
>>>>    the checksum calculation which is used to evaluate the best clock
>>>>    settings for reads.
>>>
>>> I've picked out the easy parts of this series and added
>>> them to target-arm.next:
>>>
>>>>   aspeed/timer: fix compile breakage with clang 3.4.2
>>>>   hw/arm/aspeed: change the FMC flash model of the AST2500 evb
>>>>   hw/arm/aspeed: Add an Aspeed machine class
>>>>   aspeed/smc: fix some alignment issues
>>>
>>> and left the rest for the moment (I've still got this series
>>> on my to-review list).
>>
>> I will wait for your comments on the DMA part before resending.
> 
> I've now commented on that patch. I think I'm done with review on
> this version, unless there's something specific you want more
> input on ?

No, a part from the chicken & egg problem on the RAM memory region
may be if you have some idea.  I will dig in before re-sending anyhow.

Thanks,

C.