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[Qemu-arm] [PATCH V11 8/8] pvpanic : update pvpanic document

From: Peng Hao
Subject: [Qemu-arm] [PATCH V11 8/8] pvpanic : update pvpanic document
Date: Tue, 4 Dec 2018 03:26:49 +0800

Add mmio support info in docs/specs/pvpanic.txt.

Reviewed-by: Andrew Jones <address@hidden>
Signed-off-by: Peng Hao <address@hidden>
 docs/specs/pvpanic.txt | 12 +++++++++++-
 1 file changed, 11 insertions(+), 1 deletion(-)

diff --git a/docs/specs/pvpanic.txt b/docs/specs/pvpanic.txt
index c7bbacc..994f080 100644
--- a/docs/specs/pvpanic.txt
+++ b/docs/specs/pvpanic.txt
@@ -1,7 +1,7 @@
-pvpanic device is a simulated ISA device, through which a guest panic
+pvpanic device is a simulated device, through which a guest panic
 event is sent to qemu, and a QMP event is generated. This allows
 management apps (e.g. libvirt) to be notified and respond to the event.
@@ -9,6 +9,9 @@ The management app has the option of waiting for GUEST_PANICKED 
 and/or polling for guest-panicked RunState, to learn when the pvpanic
 device has fired a panic event.
+The pvpanic device can be implemented as an ISA device (using IOPORT),
+or, since qemu 4.0, as a SYSBUS device (using MMIO).
 ISA Interface
@@ -19,6 +22,13 @@ Software should set only bits both itself and the device 
 Currently, only bit 0 is recognized, setting it indicates a guest panic
 has happened.
+SYSBUS Interface
+The SYSBUS interface is similar to the ISA interface except that it uses
+MMIO. For example, the arm virt machine could put the pvpanic device at
+[0x9070000, 0x9070001], where currently only the first byte is used.
 ACPI Interface

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