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[Qemu-arm] [PATCH 2/2] aspeed/scu: Implement power off register

From: Joel Stanley
Subject: [Qemu-arm] [PATCH 2/2] aspeed/scu: Implement power off register
Date: Tue, 11 Dec 2018 13:40:44 +1030

This register does not exist in hardware. It is here to allow the guest
code to cause Qemu to exit when required.

The register address chosen is unused in the emulated machines

Signed-off-by: Joel Stanley <address@hidden>
 hw/misc/aspeed_scu.c | 5 +++++
 1 file changed, 5 insertions(+)

diff --git a/hw/misc/aspeed_scu.c b/hw/misc/aspeed_scu.c
index c8217740efc1..aa17d032ba93 100644
--- a/hw/misc/aspeed_scu.c
+++ b/hw/misc/aspeed_scu.c
@@ -16,6 +16,7 @@
 #include "qapi/visitor.h"
 #include "qemu/bitops.h"
 #include "qemu/log.h"
+#include "sysemu/sysemu.h"
 #include "crypto/random.h"
 #include "trace.h"
@@ -84,6 +85,7 @@
 #define SRAM_DECODE_BASE1    TO_REG(0x194)
 #define SRAM_DECODE_BASE2    TO_REG(0x198)
 #define BMC_REV              TO_REG(0x19C)
+#define POWEROFF             TO_REG(0x1A0)
 #define BMC_DEV_ID           TO_REG(0x1A4)
 #define SCU_IO_REGION_SIZE 0x1000
@@ -264,6 +266,9 @@ static void aspeed_scu_write(void *opaque, hwaddr offset, 
uint64_t data,
         /* Avoid assignment below, we've handled everything */
+    case POWEROFF:
+        qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN);
+        break;
     case FREQ_CNTR_EVAL:
     case VGA_SCRATCH1 ... VGA_SCRATCH8:
     case RNG_DATA:

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