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Re: [Qemu-arm] [PATCH] aspeed/smc: snoop SPI transfers to fake dummy cyc
Cédric Le Goater
Re: [Qemu-arm] [PATCH] aspeed/smc: snoop SPI transfers to fake dummy cycles
Thu, 24 Jan 2019 14:33:19 +0100
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On 1/24/19 2:24 PM, Peter Maydell wrote:
> On Mon, 21 Jan 2019 at 15:49, Cédric Le Goater <address@hidden> wrote:
>> The m25p80 models dummy cycles using byte transfers. This works well
>> when the transfers are initiated by the QEMU model of a SPI controller
>> but when these are initiated by the OS, it breaks emulation.
>> Snoop the SPI transfer to catch commands requiring dummy cycles and
>> replace them with byte transfers compatible with the m25p80 model.
>> Signed-off-by: Cédric Le Goater <address@hidden>
> This fails to compile:
> /home/petmay01/linaro/qemu-from-laptop/qemu/hw/ssi/aspeed_smc.c: In
> function ‘aspeed_smc_do_snoop’:
> error: ‘R_DUMMY_DATA’ undeclared (first use in this function)
> ssi_transfer(s->spi, s->regs[R_DUMMY_DATA] & 0xff);
> note: each undeclared identifier is reported only once for each
> function it appears in
> /home/petmay01/linaro/qemu-from-laptop/qemu/rules.mak:69: recipe for
> target 'hw/ssi/aspeed_smc.o' failed
> Is it dependent on some other patch ?
oups. sorry :/ it depends on another patch adding this register.
I will build a patchset for the whole. It shouldn't be controversial.
I haven't add time to rework the DMA support so I will leave that out.