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Re: [Qemu-arm] [Qemu-devel] [PATCH 7/8] hw/arm/iotkit-sysctl: Implement
From: |
Richard Henderson |
Subject: |
Re: [Qemu-arm] [Qemu-devel] [PATCH 7/8] hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR* |
Date: |
Wed, 20 Feb 2019 10:28:57 -0800 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:60.0) Gecko/20100101 Thunderbird/60.4.0 |
On 2/19/19 4:58 AM, Peter Maydell wrote:
> The CPUWAIT register acts as a sort of power-control: if a bit
> in it is 1 then the CPU will have been forced into waiting
> when the system was reset (which in QEMU we model as the
> CPU starting powered off). Writing a 0 to the register will
> allow the CPU to boot (for QEMU, we model this as powering
> it on). Note that writing 0 to the register does not power
> off a CPU.
>
> For this to work correctly we need to also honour the
> INITSVTOR* registers, which let the guest control where the
> CPU will load its SP and PC from when it comes out of reset.
>
> Signed-off-by: Peter Maydell <address@hidden>
> ---
> hw/misc/iotkit-sysctl.c | 41 +++++++++++++++++++++++++++++++++++++----
> 1 file changed, 37 insertions(+), 4 deletions(-)
Reviewed-by: Richard Henderson <address@hidden>
r~
- Re: [Qemu-arm] [Qemu-devel] [PATCH 4/8] target/arm/arm-powerctl: Add new arm_set_cpu_on_and_reset(), (continued)
- [Qemu-arm] [PATCH 2/8] hw/arm/armsse: Wire up the MHUs, Peter Maydell, 2019/02/19
- [Qemu-arm] [PATCH 5/8] hw/misc/iotkit-sysctl: Correct typo in INITSVTOR0 register name, Peter Maydell, 2019/02/19
- [Qemu-arm] [PATCH 8/8] hw/arm/armsse: Unify init-svtor and cpuwait handling, Peter Maydell, 2019/02/19
- [Qemu-arm] [PATCH 6/8] hw/arm/iotkit-sysctl: Add SSE-200 registers, Peter Maydell, 2019/02/19
- [Qemu-arm] [PATCH 7/8] hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*, Peter Maydell, 2019/02/19
- Re: [Qemu-arm] [Qemu-devel] [PATCH 7/8] hw/arm/iotkit-sysctl: Implement CPUWAIT and INITSVTOR*,
Richard Henderson <=