Re: [Qemu-arm] [Qemu-devel] [PATCH] hw/arm/armsse: Make 0x5... alias region work for per-CPU devices

[Peter Maydell]

On Thu, 21 Feb 2019 at 14:44, Alex Bennée <address@hidden> wrote:
>
>
> Peter Maydell <address@hidden> writes:
>
> > The region 0x40010000 .. 0x4001ffff and its secure-only alias
> > at 0x50010000... are for per-CPU devices. We implement this by
> > giving each CPU its own container memory region, where the
> > per-CPU devices live. Unfortunately, the alias region which
> > makes devices mapped at 0x4... addresses also appear at 0x5...
> > is only implemented in the overall "all CPUs" container. The
> > effect of this bug is that the CPU_IDENTITY register block appears
> > only at 0x4001f000, but not at the 0x5001f000 alias where it should
> > also appear. Guests (like very recent Arm Trusted Firmware-M)
> > which try to access it at 0x5001f000 will crash.
> >
> > Fix this by moving the handling for this alias from the "all CPUs"
> > container to the per-CPU container. (We leave the aliases for
> > 0x1... and 0x3... in the overall container, because there are
> > no per-CPU devices there.)
> >
> > Signed-off-by: Peter Maydell <address@hidden>
>
> Looks good from code inspection. However I'm having trouble getting the
> right runes for building the firmware. What TARGET_PLATFORM matches the
> IoTKit SSE2 that uses this?

To hit this you will need to use -DTARGET_PLATFORM=AN521 for
arm-tfm, and the QEMU mps2-an521 machine.

(Building arm-tfm firmware is indeed a bit of a pain, it has
a pile of annoying dependencies and a tendency to want
bleeding-edge versions of tools like dtc and cmake.)

thanks
-- PMM