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[Qemu-arm] [PATCH v9 14/18] nvdimm: Use configurable ACPI IO base and si
From: |
Eric Auger |
Subject: |
[Qemu-arm] [PATCH v9 14/18] nvdimm: Use configurable ACPI IO base and size |
Date: |
Tue, 26 Feb 2019 21:44:35 +0100 |
From: Kwangwoo Lee <address@hidden>
This patch makes IO base and size configurable to create NPIO AML for
ACPI NFIT. Since a different architecture like AArch64 does not use
port-mapped IO, a configurable IO base is required to create correct
mapping of ACPI IO address and size.
Signed-off-by: Kwangwoo Lee <address@hidden>
Signed-off-by: Eric Auger <address@hidden>
---
v7 -> v8:
- s/NvdimmDsmIO/x86_nvdimm_acpi_dsmio
- nvdimm_init_acpi_state() now takes a AcpiGenericAddress arg
v6 -> v7:
- Use NvdimmDsmIO constant
- use AcpiGenericAddress instead of AcpiNVDIMMIOEntry
v2 -> v3:
- s/size/len in pc_piix.c and pc_q35.c
---
hw/acpi/nvdimm.c | 30 +++++++++++++++++++++---------
hw/i386/acpi-build.c | 6 ++++++
hw/i386/acpi-build.h | 3 +++
hw/i386/pc_piix.c | 2 ++
hw/i386/pc_q35.c | 2 ++
include/hw/mem/nvdimm.h | 3 +++
6 files changed, 37 insertions(+), 9 deletions(-)
diff --git a/hw/acpi/nvdimm.c b/hw/acpi/nvdimm.c
index e53b2cb681..a5250d9c88 100644
--- a/hw/acpi/nvdimm.c
+++ b/hw/acpi/nvdimm.c
@@ -926,11 +926,13 @@ void nvdimm_acpi_plug_cb(HotplugHandler *hotplug_dev,
DeviceState *dev)
}
void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
+ struct AcpiGenericAddress dsm_io,
FWCfgState *fw_cfg, Object *owner)
{
+ state->dsm_io = dsm_io;
memory_region_init_io(&state->io_mr, owner, &nvdimm_dsm_ops, state,
- "nvdimm-acpi-io", NVDIMM_ACPI_IO_LEN);
- memory_region_add_subregion(io, NVDIMM_ACPI_IO_BASE, &state->io_mr);
+ "nvdimm-acpi-io", dsm_io.bit_width >> 3);
+ memory_region_add_subregion(io, dsm_io.address, &state->io_mr);
state->dsm_mem = g_array_new(false, true /* clear */, 1);
acpi_data_push(state->dsm_mem, sizeof(NvdimmDsmIn));
@@ -959,12 +961,14 @@ void nvdimm_init_acpi_state(AcpiNVDIMMState *state,
MemoryRegion *io,
#define NVDIMM_QEMU_RSVD_UUID "648B9CF2-CDA1-4312-8AD9-49C4AF32BD62"
-static void nvdimm_build_common_dsm(Aml *dev)
+static void nvdimm_build_common_dsm(Aml *dev,
+ AcpiNVDIMMState *acpi_nvdimm_state)
{
Aml *method, *ifctx, *function, *handle, *uuid, *dsm_mem, *elsectx2;
Aml *elsectx, *unsupport, *unpatched, *expected_uuid, *uuid_invalid;
Aml *pckg, *pckg_index, *pckg_buf, *field, *dsm_out_buf, *dsm_out_buf_size;
uint8_t byte_list[1];
+ AmlRegionSpace rs;
method = aml_method(NVDIMM_COMMON_DSM, 5, AML_SERIALIZED);
uuid = aml_arg(0);
@@ -975,9 +979,16 @@ static void nvdimm_build_common_dsm(Aml *dev)
aml_append(method, aml_store(aml_name(NVDIMM_ACPI_MEM_ADDR), dsm_mem));
+ if (acpi_nvdimm_state->dsm_io.space_id == AML_AS_SYSTEM_IO) {
+ rs = AML_SYSTEM_IO;
+ } else {
+ rs = AML_SYSTEM_MEMORY;
+ }
+
/* map DSM memory and IO into ACPI namespace. */
- aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, AML_SYSTEM_IO,
- aml_int(NVDIMM_ACPI_IO_BASE), NVDIMM_ACPI_IO_LEN));
+ aml_append(method, aml_operation_region(NVDIMM_DSM_IOPORT, rs,
+ aml_int(acpi_nvdimm_state->dsm_io.address),
+ acpi_nvdimm_state->dsm_io.bit_width >> 3));
aml_append(method, aml_operation_region(NVDIMM_DSM_MEMORY,
AML_SYSTEM_MEMORY, dsm_mem, sizeof(NvdimmDsmIn)));
@@ -1260,7 +1271,8 @@ static void nvdimm_build_nvdimm_devices(Aml *root_dev,
uint32_t ram_slots)
}
static void nvdimm_build_ssdt(GArray *table_offsets, GArray *table_data,
- BIOSLinker *linker, GArray *dsm_dma_arrea,
+ BIOSLinker *linker,
+ AcpiNVDIMMState *acpi_nvdimm_state,
uint32_t ram_slots)
{
Aml *ssdt, *sb_scope, *dev;
@@ -1288,7 +1300,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets,
GArray *table_data,
*/
aml_append(dev, aml_name_decl("_HID", aml_string("ACPI0012")));
- nvdimm_build_common_dsm(dev);
+ nvdimm_build_common_dsm(dev, acpi_nvdimm_state);
/* 0 is reserved for root device. */
nvdimm_build_device_dsm(dev, 0);
@@ -1307,7 +1319,7 @@ static void nvdimm_build_ssdt(GArray *table_offsets,
GArray *table_data,
NVDIMM_ACPI_MEM_ADDR);
bios_linker_loader_alloc(linker,
- NVDIMM_DSM_MEM_FILE, dsm_dma_arrea,
+ NVDIMM_DSM_MEM_FILE, acpi_nvdimm_state->dsm_mem,
sizeof(NvdimmDsmIn), false /* high memory */);
bios_linker_loader_add_pointer(linker,
ACPI_BUILD_TABLE_FILE, mem_addr_offset, sizeof(uint32_t),
@@ -1329,7 +1341,7 @@ void nvdimm_build_acpi(GArray *table_offsets, GArray
*table_data,
return;
}
- nvdimm_build_ssdt(table_offsets, table_data, linker, state->dsm_mem,
+ nvdimm_build_ssdt(table_offsets, table_data, linker, state,
ram_slots);
device_list = nvdimm_get_device_list();
diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c
index 9ecc96dcc7..4809abf23d 100644
--- a/hw/i386/acpi-build.c
+++ b/hw/i386/acpi-build.c
@@ -125,6 +125,12 @@ typedef struct FwCfgTPMConfig {
uint8_t tpmppi_version;
} QEMU_PACKED FwCfgTPMConfig;
+const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio = {
+ .space_id = AML_AS_SYSTEM_IO,
+ .address = NVDIMM_ACPI_IO_BASE,
+ .bit_width = NVDIMM_ACPI_IO_LEN << 3
+};
+
static void init_common_fadt_data(Object *o, AcpiFadtData *data)
{
uint32_t io = object_property_get_uint(o, ACPI_PM_PROP_PM_IO_BASE, NULL);
diff --git a/hw/i386/acpi-build.h b/hw/i386/acpi-build.h
index 007332e51c..74df5fc612 100644
--- a/hw/i386/acpi-build.h
+++ b/hw/i386/acpi-build.h
@@ -1,6 +1,9 @@
#ifndef HW_I386_ACPI_BUILD_H
#define HW_I386_ACPI_BUILD_H
+#include "hw/acpi/acpi-defs.h"
+
+extern const struct AcpiGenericAddress x86_nvdimm_acpi_dsmio;
void acpi_setup(void);
diff --git a/hw/i386/pc_piix.c b/hw/i386/pc_piix.c
index fd0f2c268f..e8988f6669 100644
--- a/hw/i386/pc_piix.c
+++ b/hw/i386/pc_piix.c
@@ -58,6 +58,7 @@
#include "migration/misc.h"
#include "kvm_i386.h"
#include "sysemu/numa.h"
+#include "hw/i386/acpi-build.h"
#define MAX_IDE_BUS 2
@@ -299,6 +300,7 @@ static void pc_init1(MachineState *machine,
if (pcms->acpi_nvdimm_state.is_enabled) {
nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
+ x86_nvdimm_acpi_dsmio,
pcms->fw_cfg, OBJECT(pcms));
}
}
diff --git a/hw/i386/pc_q35.c b/hw/i386/pc_q35.c
index 4a175ea50e..3dddf6e1b2 100644
--- a/hw/i386/pc_q35.c
+++ b/hw/i386/pc_q35.c
@@ -54,6 +54,7 @@
#include "qapi/error.h"
#include "qemu/error-report.h"
#include "sysemu/numa.h"
+#include "hw/i386/acpi-build.h"
/* ICH9 AHCI has 6 ports */
#define MAX_SATA_PORTS 6
@@ -331,6 +332,7 @@ static void pc_q35_init(MachineState *machine)
if (pcms->acpi_nvdimm_state.is_enabled) {
nvdimm_init_acpi_state(&pcms->acpi_nvdimm_state, system_io,
+ x86_nvdimm_acpi_dsmio,
pcms->fw_cfg, OBJECT(pcms));
}
}
diff --git a/include/hw/mem/nvdimm.h b/include/hw/mem/nvdimm.h
index c5c9b3c7f8..bbb72f27ac 100644
--- a/include/hw/mem/nvdimm.h
+++ b/include/hw/mem/nvdimm.h
@@ -25,6 +25,7 @@
#include "hw/mem/pc-dimm.h"
#include "hw/acpi/bios-linker-loader.h"
+#include "hw/acpi/aml-build.h"
#define NVDIMM_DEBUG 0
#define nvdimm_debug(fmt, ...) \
@@ -140,10 +141,12 @@ struct AcpiNVDIMMState {
*/
int32_t persistence;
char *persistence_string;
+ struct AcpiGenericAddress dsm_io;
};
typedef struct AcpiNVDIMMState AcpiNVDIMMState;
void nvdimm_init_acpi_state(AcpiNVDIMMState *state, MemoryRegion *io,
+ struct AcpiGenericAddress dsm_io,
FWCfgState *fw_cfg, Object *owner);
void nvdimm_build_acpi(GArray *table_offsets, GArray *table_data,
BIOSLinker *linker, AcpiNVDIMMState *state,
--
2.20.1
- [Qemu-arm] [PATCH v9 05/18] kvm: add kvm_arm_get_max_vm_ipa_size, (continued)
- [Qemu-arm] [PATCH v9 05/18] kvm: add kvm_arm_get_max_vm_ipa_size, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 06/18] vl: Set machine ram_size, maxram_size and ram_slots earlier, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 07/18] hw/arm/virt: Dynamic memory map depending on RAM requirements, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 08/18] hw/arm/virt: Implement kvm_type function for 4.0 machine, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 09/18] hw/arm/virt: Check the VCPU PA range in TCG mode, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 10/18] hw/arm/virt: Bump the 255GB initial RAM limit, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 11/18] hw/arm/virt: Add memory hotplug framework, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 12/18] hw/arm/boot: Expose the PC-DIMM nodes in the DT, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 13/18] hw/arm/virt-acpi-build: Add PC-DIMM in SRAT, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 15/18] machine: Move acpi_nvdimm_state into struct MachineState, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 14/18] nvdimm: Use configurable ACPI IO base and size,
Eric Auger <=
- [Qemu-arm] [PATCH v9 16/18] hw/arm/virt: Add nvdimm hot-plug infrastructure, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 17/18] hw/arm/boot: Expose the pmem nodes in the DT, Eric Auger, 2019/02/26
- [Qemu-arm] [PATCH v9 18/18] hw/arm/virt: Allow nvdimm instantiation, Eric Auger, 2019/02/26