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Re: [Qemu-arm] [Qemu-devel] [PATCH] Re-evaluate SVE vector length everyt
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Re: [Qemu-arm] [Qemu-devel] [PATCH] Re-evaluate SVE vector length everytime ADDVL/RDVL is called |
Date: |
Wed, 13 Mar 2019 07:01:23 -0700 (PDT) |
Patchew URL: https://patchew.org/QEMU/address@hidden/
Hi,
This series seems to have some coding style problems. See output below for
more information:
Type: series
Message-id: address@hidden
Subject: [Qemu-devel] [PATCH] Re-evaluate SVE vector length everytime
ADDVL/RDVL is called
=== TEST SCRIPT BEGIN ===
#!/bin/bash
git rev-parse base > /dev/null || exit 0
git config --local diff.renamelimit 0
git config --local diff.renames True
git config --local diff.algorithm histogram
./scripts/checkpatch.pl --mailback base..
=== TEST SCRIPT END ===
Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384
From https://github.com/patchew-project/qemu
* [new tag] patchew/address@hidden -> patchew/address@hidden
t [tag update] patchew/address@hidden -> patchew/address@hidden
t [tag update] patchew/address@hidden -> patchew/address@hidden
Switched to a new branch 'test'
eeefe7de7f Re-evaluate SVE vector length everytime ADDVL/RDVL is called
=== OUTPUT BEGIN ===
ERROR: trailing whitespace
#35: FILE: target/arm/translate-a64.c:109:
+ $
WARNING: Block comments use a leading /* on a separate line
#45: FILE: target/arm/translate-a64.c:587:
+/* Get a temporary register containing the current vector length
ERROR: open brace '{' following function declarations go on the next line
#47: FILE: target/arm/translate-a64.c:589:
+TCGv_i64 get_cpu_vec_len(DisasContext *s) {
total: 2 errors, 1 warnings, 61 lines checked
Commit eeefe7de7f5c (Re-evaluate SVE vector length everytime ADDVL/RDVL is
called) has style problems, please review. If any of these errors
are false positives report them to the maintainer, see
CHECKPATCH in MAINTAINERS.
=== OUTPUT END ===
Test command exited with code: 1
The full log is available at
http://patchew.org/logs/address@hidden/testing.checkpatch/?type=message.
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