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[Qemu-arm] [PATCH v3 01/69] target/arm: Use store_reg_from_load in thumb
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v3 01/69] target/arm: Use store_reg_from_load in thumb2 code |
Date: |
Wed, 28 Aug 2019 12:03:48 -0700 |
This function already includes the test for an interworking write
to PC from a load. Change the T32 LDM implementation to match the
A32 LDM implementation.
For LDM, the reordering of the tests does not change valid
behaviour because the only case that differs is has rn == 15,
which is UNPREDICTABLE.
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 12 +++---------
1 file changed, 3 insertions(+), 9 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index cbe19b7a62..35e59a8a16 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -9707,13 +9707,11 @@ static void disas_thumb2_insn(DisasContext *s, uint32_t
insn)
/* Load. */
tmp = tcg_temp_new_i32();
gen_aa32_ld32u(s, tmp, addr, get_mem_index(s));
- if (i == 15) {
- gen_bx_excret(s, tmp);
- } else if (i == rn) {
+ if (i == rn) {
loaded_var = tmp;
loaded_base = 1;
} else {
- store_reg(s, i, tmp);
+ store_reg_from_load(s, i, tmp);
}
} else {
/* Store. */
@@ -10847,11 +10845,7 @@ static void disas_thumb2_insn(DisasContext *s,
uint32_t insn)
tcg_temp_free_i32(addr);
goto illegal_op;
}
- if (rs == 15) {
- gen_bx_excret(s, tmp);
- } else {
- store_reg(s, rs, tmp);
- }
+ store_reg_from_load(s, rs, tmp);
} else {
/* Store. */
tmp = load_reg(s, rs);
--
2.17.1
- [Qemu-arm] [PATCH v3 00/69] target/arm: Convert aa32 base isa to decodetree, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 01/69] target/arm: Use store_reg_from_load in thumb2 code,
Richard Henderson <=
- [Qemu-arm] [PATCH v3 02/69] target/arm: Add stubs for aa32 decodetree, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 03/69] target/arm: Convert Data Processing (register), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 05/69] target/arm: Convert Data Processing (immediate), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 04/69] target/arm: Convert Data Processing (reg-shifted-reg), Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 07/69] target/arm: Simplify UMAAL, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 06/69] target/arm: Convert multiply and multiply accumulate, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 08/69] target/arm: Convert Saturating addition and subtraction, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 09/69] target/arm: Convert Halfword multiply and multiply accumulate, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 10/69] target/arm: Simplify op_smlaxxx for SMLAL*, Richard Henderson, 2019/08/28
- [Qemu-arm] [PATCH v3 12/69] target/arm: Convert MSR (immediate) and hints, Richard Henderson, 2019/08/28