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[Qemu-arm] [PATCH v4 49/69] target/arm: Convert T16 add pc/sp (immediate
From: |
Richard Henderson |
Subject: |
[Qemu-arm] [PATCH v4 49/69] target/arm: Convert T16 add pc/sp (immediate) |
Date: |
Wed, 4 Sep 2019 12:30:39 -0700 |
Reviewed-by: Peter Maydell <address@hidden>
Signed-off-by: Richard Henderson <address@hidden>
---
target/arm/translate.c | 12 +-----------
target/arm/t16.decode | 7 +++++++
2 files changed, 8 insertions(+), 11 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 4ae73d1c92..d8a4c7bf99 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -10868,19 +10868,9 @@ static void disas_thumb_insn(DisasContext *s, uint32_t
insn)
case 7: /* load/store byte immediate offset, in decodetree */
case 8: /* load/store halfword immediate offset, in decodetree */
case 9: /* load/store from stack, in decodetree */
+ case 10: /* add PC/SP (immediate), in decodetree */
goto illegal_op;
- case 10:
- /*
- * 0b1010_xxxx_xxxx_xxxx
- * - Add PC/SP (immediate)
- */
- rd = (insn >> 8) & 7;
- val = (insn & 0xff) * 4;
- tmp = add_reg_for_lit(s, insn & (1 << 11) ? 13 : 15, val);
- store_reg(s, rd, tmp);
- break;
-
case 11:
/* misc */
op = (insn >> 8) & 0xf;
diff --git a/target/arm/t16.decode b/target/arm/t16.decode
index 1cf79789ac..71b3e8f02e 100644
--- a/target/arm/t16.decode
+++ b/target/arm/t16.decode
@@ -23,6 +23,7 @@
&s_rrr_shr !extern s rn rd rm rs shty
&s_rri_rot !extern s rn rd imm rot
&s_rrrr !extern s rd rn rm ra
+&ri !extern rd imm
&ldst_rr !extern p w u rn rt rm shimm shtype
&ldst_ri !extern p w u rn rt imm
@@ -102,3 +103,9 @@ LDRH_ri 10001 ..... ... ... @ldst_ri_2
STR_ri 10010 ... ........ @ldst_spec_i rn=13
LDR_ri 10011 ... ........ @ldst_spec_i rn=13
+
+# Add PC/SP (immediate)
+
+ADR 10100 rd:3 ........ imm=%imm8_0x4
+ADD_rri 10101 rd:3 ........ \
+ &s_rri_rot rn=13 s=0 rot=0 imm=%imm8_0x4 # SP
--
2.17.1
- [Qemu-arm] [PATCH v4 41/69] target/arm: Convert SG, (continued)
- [Qemu-arm] [PATCH v4 41/69] target/arm: Convert SG, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 40/69] target/arm: Convert Table Branch, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 42/69] target/arm: Convert TT, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 44/69] target/arm: Simplify disas_arm_insn, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 43/69] target/arm: Simplify disas_thumb2_insn, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 45/69] target/arm: Add skeleton for T16 decodetree, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 46/69] target/arm: Convert T16 data-processing (two low regs), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 47/69] target/arm: Convert T16 load/store (register offset), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 48/69] target/arm: Convert T16 load/store (immediate offset), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 51/69] target/arm: Convert T16 add/sub (3 low, 2 low and imm), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 49/69] target/arm: Convert T16 add pc/sp (immediate),
Richard Henderson <=
- [Qemu-arm] [PATCH v4 55/69] target/arm: Convert T16 adjust sp (immediate), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 50/69] target/arm: Convert T16 load/store multiple, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 53/69] target/arm: Convert T16 branch and exchange, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 54/69] target/arm: Convert T16 add, compare, move (two high registers), Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 63/69] target/arm: Convert T16, Miscellaneous 16-bit instructions, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 64/69] target/arm: Convert T16, shift immediate, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 66/69] target/arm: Convert T16, Unconditional branch, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 57/69] target/arm: Convert T16, Change processor state, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 61/69] target/arm: Convert T16, push and pop, Richard Henderson, 2019/09/04
- [Qemu-arm] [PATCH v4 52/69] target/arm: Convert T16 one low register and immediate, Richard Henderson, 2019/09/04