El mié., 4 sept. 2019 a las 19:13, Philippe Mathieu-Daudé (<
address@hidden>) escribió:
Various logging improvements as once:
- Use 0x prefix for hex numbers
- Display value written during write accesses
- Move some logs from GUEST_ERROR to UNIMP
Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
---
v2: Use PRIx64 format (pm215)
---
hw/char/bcm2835_aux.c | 5 +++--
hw/dma/bcm2835_dma.c | 8 ++++----
hw/intc/bcm2836_control.c | 7 ++++---
hw/misc/bcm2835_mbox.c | 7 ++++---
hw/misc/bcm2835_property.c | 16 ++++++++++------
5 files changed, 25 insertions(+), 18 deletions(-)
diff --git a/hw/char/bcm2835_aux.c b/hw/char/bcm2835_aux.c
index 3f855196e3..a6fc1bf152 100644
--- a/hw/char/bcm2835_aux.c
+++ b/hw/char/bcm2835_aux.c
@@ -162,8 +162,9 @@ static void bcm2835_aux_write(void *opaque, hwaddr offset, uint64_t value,
switch (offset) {
case AUX_ENABLES:
if (value != 1) {
- qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI "
- "or disable UART\n", __func__);
+ qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI"
+ " or disable UART: 0x%"PRIx64"\n",
+ __func__, value);
}
break;
I found others qemu_log_mask calls in this file, why did you only add "0x%" to this calls ?
Icho :: qemu/qemu/hw 148 » grep -r qemu_log_mask char/bcm2835_aux.c
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_LCR_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MCR_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MSR_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_SCRATCH unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_BAUD_REG unsupported\n", __func__);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
qemu_log_mask(LOG_UNIMP, "%s: unsupported attempt to enable SPI "
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_LCR_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_MCR_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_SCRATCH unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_CNTL_REG unsupported\n", __func__);
qemu_log_mask(LOG_UNIMP, "%s: AUX_MU_BAUD_REG unsupported\n", __func__);
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
diff --git a/hw/dma/bcm2835_dma.c b/hw/dma/bcm2835_dma.c
index 192bd377a0..6acc2b644e 100644
--- a/hw/dma/bcm2835_dma.c
+++ b/hw/dma/bcm2835_dma.c
@@ -180,7 +180,7 @@ static uint64_t bcm2835_dma_read(BCM2835DMAState *s, hwaddr offset,
res = ch->debug;
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
break;
}
@@ -228,7 +228,7 @@ static void bcm2835_dma_write(BCM2835DMAState *s, hwaddr offset,
ch->debug = value;
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
break;
}
@@ -247,7 +247,7 @@ static uint64_t bcm2835_dma0_read(void *opaque, hwaddr offset, unsigned size)
case BCM2708_DMA_ENABLE:
return s->enable;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -274,7 +274,7 @@ static void bcm2835_dma0_write(void *opaque, hwaddr offset, uint64_t value,
s->enable = (value & 0xffff);
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
}
}
diff --git a/hw/intc/bcm2836_control.c b/hw/intc/bcm2836_control.c
index 04229b8a17..61f884ff9e 100644
--- a/hw/intc/bcm2836_control.c
+++ b/hw/intc/bcm2836_control.c
@@ -264,7 +264,7 @@ static uint64_t bcm2836_control_read(void *opaque, hwaddr offset, unsigned size)
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
return s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2];
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -293,8 +293,9 @@ static void bcm2836_control_write(void *opaque, hwaddr offset,
} else if (offset >= REG_MBOX0_RDCLR && offset < REG_LIMIT) {
s->mailboxes[(offset - REG_MBOX0_RDCLR) >> 2] &= ~val;
} else {
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
- __func__, offset);
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
+ " value 0x%"PRIx64"\n",
+ __func__, offset, val);
return;
}
diff --git a/hw/misc/bcm2835_mbox.c b/hw/misc/bcm2835_mbox.c
index 79bad11631..7690b9afaf 100644
--- a/hw/misc/bcm2835_mbox.c
+++ b/hw/misc/bcm2835_mbox.c
@@ -176,7 +176,7 @@ static uint64_t bcm2835_mbox_read(void *opaque, hwaddr offset, unsigned size)
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx"\n",
__func__, offset);
return 0;
}
@@ -228,8 +228,9 @@ static void bcm2835_mbox_write(void *opaque, hwaddr offset,
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
- __func__, offset);
+ qemu_log_mask(LOG_UNIMP, "%s: Unsupported offset 0x%"HWADDR_PRIx
+ " value 0x%"PRIx64"\n",
+ __func__, offset, value);
return;
}
Same question here:
Icho :: qemu/qemu/hw 148 » grep -r qemu_log_mask misc/bcm2835_mbox.c
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
qemu_log_mask(LOG_GUEST_ERROR, "%s: mailbox full\n", __func__);
qemu_log_mask(LOG_GUEST_ERROR, "%s: invalid channel %u\n",
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
diff --git a/hw/misc/bcm2835_property.c b/hw/misc/bcm2835_property.c
index d8eb28f267..ab66d3572e 100644
--- a/hw/misc/bcm2835_property.c
+++ b/hw/misc/bcm2835_property.c
@@ -56,7 +56,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010001: /* Get board model */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x get board model NYI\n", tag);
+ "bcm2835_property: 0x%08x get board model NYI\n",
+ tag);
/* FIXME returning uninitialized memory */
resplen = 4;
break;
@@ -70,7 +71,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
case 0x00010004: /* Get board serial */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x get board serial NYI\n", tag);
+ "bcm2835_property: 0x%08x get board serial NYI\n",
+ tag);
/* FIXME returning uninitialized memory */
resplen = 8;
break;
@@ -106,7 +108,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038001: /* Set clock state */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x set clock state NYI\n", tag);
+ "bcm2835_property: 0x%08x set clock state NYI\n",
+ tag);
resplen = 8;
break;
@@ -139,7 +142,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
case 0x00038004: /* Set max clock rate */
case 0x00038007: /* Set min clock rate */
qemu_log_mask(LOG_UNIMP,
- "bcm2835_property: %x set clock rates NYI\n", tag);
+ "bcm2835_property: 0x%08x set clock rate NYI\n",
+ tag);
resplen = 8;
break;
@@ -284,8 +288,8 @@ static void bcm2835_property_mbox_push(BCM2835PropertyState *s, uint32_t value)
break;
default:
- qemu_log_mask(LOG_GUEST_ERROR,
- "bcm2835_property: unhandled tag %08x\n", tag);
+ qemu_log_mask(LOG_UNIMP,
+ "bcm2835_property: unhandled tag 0x%08x\n", tag);
break;
}
Same question here:
Icho :: qemu/qemu/hw 148 » grep -r qemu_log_mask misc/bcm2835_property.c
qemu_log_mask(LOG_UNIMP,
qemu_log_mask(LOG_UNIMP,
qemu_log_mask(LOG_UNIMP,
qemu_log_mask(LOG_UNIMP,
qemu_log_mask(LOG_GUEST_ERROR,
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
qemu_log_mask(LOG_GUEST_ERROR, "%s: Bad offset %"HWADDR_PRIx"\n",
--
2.20.1
I found other calls to qemu_log_mask in others files: hw/display/bcm2835_fb.c, hw/gpio/bcm2835_gpio.c, hw/intc/bcm2835_ic.c, hw/misc/bcm2835_rng.c and hw/sd/bcm2835_sdhost.c.