Re: [PATCH 12/19] hw/arm/bcm2835_peripherals: Add Clock/Power/Reset Manager blocks

[Philippe Mathieu-Daudé]

On Tue, Oct 1, 2019 at 11:51 AM Philippe Mathieu-Daudé
<address@hidden> wrote:
> On 9/26/19 7:34 PM, Philippe Mathieu-Daudé wrote:
> > Add basic support for BCM283x CPRMAN. Provide support for reading and
> > writing CPRMAN registers and initialize registers with sensible default
> > values. During runtime retain any written values.
> >
> > Basic CPRMAN support is necessary and sufficient to boot Linux on raspi2
> > and raspi3 systems.
> >
> > Based on:
> > https://github.com/raspberrypi/linux/blob/rpi-5.3.y/drivers/clk/bcm/clk-bcm2835.c
> > https://github.com/u-boot/u-boot/blob/v2019.07/include/dt-bindings/clock/bcm2835.h
> > https://github.com/arisena-com/rpi_src/blob/master/apps/i2s_test/src/i2s_test.c#L273
> >
> > Co-developed-by: Guenter Roeck <address@hidden>
> > Signed-off-by: Guenter Roeck <address@hidden>
> > Signed-off-by: Philippe Mathieu-Daudé <address@hidden>
> > ---
> >   hw/arm/bcm2835_peripherals.c         |  20 +-
> >   hw/misc/Makefile.objs                |   1 +
> >   hw/misc/bcm2835_cprman.c             | 383 +++++++++++++++++++++++++++
> >   hw/misc/trace-events                 |   8 +
> >   include/hw/arm/bcm2835_peripherals.h |   4 +-
> >   include/hw/misc/bcm2835_cprman.h     |  32 +++
> >   6 files changed, 444 insertions(+), 4 deletions(-)
> >   create mode 100644 hw/misc/bcm2835_cprman.c
> >   create mode 100644 include/hw/misc/bcm2835_cprman.h
> >
> > diff --git a/hw/misc/bcm2835_cprman.c b/hw/misc/bcm2835_cprman.c
> > new file mode 100644
> > index 0000000000..6c3b5b6837
> > --- /dev/null
> > +++ b/hw/misc/bcm2835_cprman.c
> > @@ -0,0 +1,383 @@
> > +/*
> > + * BCM2835 Clock/Power/Reset Manager subsystem (poor man's version)
> > + *
> > + * Copyright (C) 2018 Guenter Roeck <address@hidden>
> > + * Copyright (C) 2018 Philippe Mathieu-Daudé <address@hidden>
> > + *
> > + * This work is licensed under the terms of the GNU GPL, version 2 or 
> > later.
> > + * See the COPYING file in the top-level directory.
> > + */
> > +
> > +#include "qemu/osdep.h"
> > +#include "qemu/log.h"
> > +#include "sysemu/runstate.h"
> > +#include "hw/registerfields.h"
> > +#include "hw/misc/bcm2835_cprman.h"
> > +#include "trace.h"
> > +
> > +#define CPRMAN_PASSWD 'Z'
> > +
> > +FIELD(CPRMAN, PASSWD,   24, 8)
> > +
[...]
> > +REG32(A2W_PLL_CTRL, 0x00)
> > +FIELD(A2W_PLL_CTRL, NDIV,                   0, 12)
> > +FIELD(A2W_PLL_CTRL, PDIV,                   12, 3)
> > +FIELD(A2W_PLL_CTRL, POWER_DOWN,             16, 1)
> > +FIELD(A2W_PLL_CTRL, POWER_RESET_DISABLE,    17, 1)
> > +
> > +REG32(A2W_PLL_ANA0, 0x10)
> > +
> > +FIELD(A2W_PLL_FRAC, DIV,                    0, 20)
> > +
> > +FIELD(A2W_PLL_CHAN, DIV,                    0, 8)
> > +FIELD(A2W_PLL_CHAN, DISABLE,                8, 1)
> > +
> > +static const char *a2w_name(hwaddr addr)
> > +{
> > +    if (addr >= 0x300) {
> > +        return "CHANx";
> > +    }
> > +    if (addr >= 0x200) {
> > +        return "FRACx";
> > +    }
> > +    switch (addr & 0x1f) {
> > +    case A_A2W_PLL_CTRL:
> > +        return "CTRL";
> > +    case A_A2W_PLL_ANA0:
> > +        return "ANA0";
> > +    default:
> > +        return "UNKN";
> > +    }
> > +}
> > +
> > +static const char *pll_name(int idx)
> > +{
> > +    static const char *pll_names[8] = {
> > +        [0] = "PLLA",
> > +        [1] = "PLLC",
> > +        [2] = "PLLD",
> > +        [3] = "PLLH",
> > +        [7] = "PLLB",
> > +    };
> > +    return pll_names[idx] ? pll_names[idx] : "UNKN";
> > +}
> > +
> > +static uint64_t bcm2835_cprman_a2w_read(void *opaque, hwaddr addr,
> > +                                        unsigned size)
> > +{
> > +    uint32_t res = 0;
> > +
> > +    if (addr < 0x200) {
> > +        /* Power */
> > +        switch (addr & 0x1f) {
> > +        case A_A2W_PLL_CTRL:
> > +            res = R_A2W_PLL_CTRL_POWER_DOWN_MASK; /* On */

This should be R_A2W_PLL_CTRL_POWER_RESET_DISABLE_MASK.

> > +            break;
> > +        case A_A2W_PLL_ANA0:
> > +            break;
> > +        }
> > +    } else {
> > +        /* addr < 0x300 is FREQ, else CHANNEL */
> > +        qemu_log_mask(LOG_UNIMP, "%s: bad offset 0x%" HWADDR_PRIx "\n",
> > +                      __func__, addr);
> > +    }
> > +    trace_bcm2835_cprman_read(size << 3, addr, "A2W", a2w_name(addr),
> > +                              pll_name((addr >> 5) & 7), res);
> > +
> > +    return res;
> > +}
> > +
> > +static void bcm2835_cprman_a2w_write(void *opaque, hwaddr addr,
> > +                                     uint64_t value, unsigned size)
> > +{
> > +    if (FIELD_EX32(value, CPRMAN, PASSWD) != CPRMAN_PASSWD) {
> > +        qemu_log_mask(LOG_GUEST_ERROR, "[CPRMAN]: password key error w%02d"
> > +                                       " *0x%04"HWADDR_PRIx" = 
> > 0x%"PRIx64"\n",
> > +                      size << 3, addr, value);
> > +        return;
> > +    }
> > +    value &= ~R_CPRMAN_PASSWD_MASK;
> > +
> > +    trace_bcm2835_cprman_write_a2w(addr, a2w_name(addr),
> > +                                   pll_name((addr >> 5) & 7), value);
> > +}
> > +
> > +static const MemoryRegionOps bcm2835_cprman_a2w_ops = {
> > +    .read = bcm2835_cprman_a2w_read,
> > +    .write = bcm2835_cprman_a2w_write,
> > +    .impl.max_access_size = 4,
> > +    .valid.min_access_size = 4,
> > +    .endianness = DEVICE_NATIVE_ENDIAN,
> > +};
[...]