Re: gicv2 virtual interface alias base address

[Peter Maydell]

On Wed, 5 Feb 2020 at 18:32, Jose Martins <address@hidden> wrote:
>
> Gicv2 specification describes a mandatory global alias region through
> which any virtual interface can be accessed by any cpu. Looking at
> arm_gic_realize function this region seems to be implemented ( /*Extra
> core-specific regions for virtual interfaces. This is required by the
> GICv2 specification */). However, I cant figure out what would be its
> based address on the memory map. I'm using the virt platform. Can
> anyone help me with this?

These are required by the GIC specification, but there's nothing
that requires any particular SoC or board to actually expose them
to the programmer. The 'virt' board does not map these. What
you get is the GICH_* virtual interface control registers at
0x08030000, and the GICV_* virtual CPU interface at 0x08040000.
In both cases the registers apply to the current CPU (ie the CPU
you access them from); there is no direct access to another CPU's
GIC interfaces.

(Our GIC model provides the for-each-core memory regions because
a few of the boards we model (eg one of the xilinx boards) provide
that facility in hardware.)

thanks
-- PMM