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Re: gicv2 virtual interface alias base address

From: Peter Maydell
Subject: Re: gicv2 virtual interface alias base address
Date: Thu, 6 Feb 2020 19:21:25 +0000

On Thu, 6 Feb 2020 at 19:05, Jose Martins <address@hidden> wrote:
> Thank you for the clarification Peter. From what I gather from your
> explanation, the functionality might be present in the GIC IP but the
> SoC designer might choose not to actually expose it in the platform
> memory map. But do you see any specific reason why an SoC designer
> might do this? Also, in the case of the virt board, and since support
> for this is present in other qemu platforms, is there a specific
> reason not to include it?

The virt board doesn't include it largely because that board
is primarily designed to run Linux guests, and Linux does not
use that aspect of GICv2 functionality.

(The GICv3 and later do not provide this kind of cross-CPU
access functionality at all, so software design that relies
on it is restricting itself to a subset of hardware that's
rapidly aging out of existence.)

-- PMM

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