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Re: [RESEND RFC PATCH v2 1/2] target/arm: Allow to inject SError interru

From: Gavin Shan
Subject: Re: [RESEND RFC PATCH v2 1/2] target/arm: Allow to inject SError interrupt
Date: Thu, 13 Feb 2020 14:49:21 +1100
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.2.0

On 2/12/20 10:34 PM, Peter Maydell wrote:
On Wed, 12 Feb 2020 at 06:39, Gavin Shan <address@hidden> wrote:
On 2/5/20 10:05 PM, Gavin Shan wrote:
This allows to inject SError interrupt, which will be used on receiving
QMP/HMP "nmi" command in next patch.

Signed-off-by: Gavin Shan <address@hidden>
   target/arm/cpu.c    | 11 +++++++++++
   target/arm/cpu.h    | 12 +++++++++---
   target/arm/helper.c |  4 ++++
   3 files changed, 24 insertions(+), 3 deletions(-)

Hi Peter, could you please take a look when you get a chance? I'm not sure
the implementation is good enough to inject SError. If there are somebody
else who can help to review, please let me know so that I can copy her/him

Yeah, this is on my list to look at; Richard Henderson also could
have a look at it. From a quick scan I suspect you may be missing
handling for AArch32.

[Thanks for copying Richard Henderson]

Yes, the functionality is only supported on aarch64 currently by intention
because the next patch enables it on "max" and "host" CPU models and both
of them are running in aarch64 mode.


If you really want to get this supported for aarch32 either, I can do
it. However, it seems there is a long list of aarch32 CPU models, defined
in target/arm/cpu.c::arm_cpus. so which CPU models you prefer to see with
this supported? I think we might choose one or two popular CPU models if
you agree.


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