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Re: [PATCH v2 05/17] target/arm: Improve ID_AA64PFR0 FP/SIMD validation

From: Peter Maydell
Subject: Re: [PATCH v2 05/17] target/arm: Improve ID_AA64PFR0 FP/SIMD validation
Date: Tue, 25 Feb 2020 15:58:28 +0000

On Tue, 25 Feb 2020 at 15:55, Richard Henderson
<address@hidden> wrote:
> On 2/25/20 5:24 AM, Peter Maydell wrote:
> > This check is supposed to be "did the user accidentally specify
> > some incompatible settings on their '-cpu,+this,-that' option?".
> > By making it check the actual ID register values, you're turning
> > it into also a check on "does the implementation specify sane
> > ID register values", which (a) is useful for TCG but ought to
> > be an assert and (b) we shouldn't be checking for KVM in case
> > the h/w is giving us dubious ID values.
> Hmm.  Because kvm64 unconditionally set VFP and NEON, you're right.  It was
> only kvm32 that was examining id registers.
> The only consequence of kvm giving us dubious id values that I can see is if
> ADVSIMD is on, but FP is off, we won't migrate the register set.
> Do you want me to add a tcg_enabled check, or shall we just drop the patch?
> The existing test is good enough for just checking the command-line.

If it isn't a requirement for the rest of the series, let's just
drop the patch.

-- PMM

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