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Re: ARM SVE issues with non "standard" vector lengths

From: Richard Henderson
Subject: Re: ARM SVE issues with non "standard" vector lengths
Date: Thu, 23 Apr 2020 08:19:05 -0700
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.7.0

On 4/23/20 6:59 AM, Laurent Desnogues wrote:
> 2. sve_zip_p
> This generates extraneous data in the higher part of the result.
> I hit this when I got a wrong result on an instruction that ends up
> using sve_cntp which counts all bits set in each 64-bit chunk. There
> might be some other instructions beyond ZIP that generate extra data
> that would break sve_cntp.  So perhaps it'd be easier to fix sve_cmtp
> (and hope that it's the only function that uses bits beyond vector
> length...).

There are quite a few places that assume (and some that assert, such as the
load/store paths) that there are no predicate bits set beyond VL.

I will fix zip.


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