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Re: [PATCH v3 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidatio
From: |
Peter Maydell |
Subject: |
Re: [PATCH v3 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation |
Date: |
Fri, 10 Jul 2020 11:39:38 +0100 |
On Fri, 10 Jul 2020 at 11:05, Auger Eric <eric.auger@redhat.com> wrote:
> On 7/10/20 11:47 AM, Peter Maydell wrote:
> > I think that to advertise SMMUv3.2 we would also need to
> > set the IDR3.BBML field to something non-zero. That means
> > we need to analyze our implementation of the caching of page
> > table structures to see if we need to do anything different
> > (per the behaviours and guarantees described in section 3.21.1
> > of the spec).
>
> you're right. I need to further study this feature.
>
> I felt difficult to find out which features are mandatory for a given
> revision number.
Mmm. I ended up just working through all the ID register
fields looking for references to 3.1 or 3.2 in them,
but it's easy to overlook one (I failed to catch
the IDR3.HAD requirement in my initial scan,
for instance :-)).
-- PMM
- [PATCH v3 10/11] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support, (continued)
- [PATCH v3 10/11] hw/arm/smmuv3: Support HAD and advertise SMMUv3.1 support, Eric Auger, 2020/07/08
- [PATCH v3 04/11] hw/arm/smmu: Introduce SMMUTLBEntry for PTW and IOTLB value, Eric Auger, 2020/07/08
- [PATCH v3 09/11] hw/arm/smmuv3: Let AIDR advertise SMMUv3.0 support, Eric Auger, 2020/07/08
- [PATCH v3 08/11] hw/arm/smmuv3: Fix IIDR offset, Eric Auger, 2020/07/08
- [PATCH v3 11/11] hw/arm/smmuv3: Advertise SMMUv3.2 range invalidation, Eric Auger, 2020/07/08
- [PATCH v3 06/11] hw/arm/smmuv3: Introduce smmuv3_s1_range_inval() helper, Eric Auger, 2020/07/08