[Top][All Lists]

[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]

Re: v8.1M cpu emulation and target-arm feature-identification strategy

From: Philippe Mathieu-Daudé
Subject: Re: v8.1M cpu emulation and target-arm feature-identification strategy
Date: Wed, 5 Aug 2020 14:22:30 +0200
User-agent: Mozilla/5.0 (X11; Linux x86_64; rv:68.0) Gecko/20100101 Thunderbird/68.5.0

On 8/5/20 1:08 PM, Peter Maydell wrote:
> Mostly recently we've been aiming for QEMU emulation code in
> target/arm to use ID register fields to determine whether a
> feature is present or not (the isar_feature_* functions) rather
> than the old style of defining ARM_FEATURE_* flags. This seems to
> be working out well for A-profile. However, for v8.1M there are
> a small handful of minor behaviour differences which don't have an
> associated ID register field, but which are instead in the spec
> and pseudocode just called out as "if this is a v8.1M CPU".
> (The major v8.1M new features do have ID register fields.)
> I can think of two ways to handle this:
>  (1) define an ARM_FEATURE_V81M flag
>  (2) define an isar_feature_aa32_v81m() function which under the
>      hood is actually testing for a specific feature which happens
>      to be known to be always present in v8.1M, like low-overhead-branches
>      (ie ID_ISAR0.CmpBranch >=3)

FWIW finding myself sometime git-grepping 'isar_feature' I'd rather
choose (2), even if there is no such v8.1M ID register field.
That said, my end-user preference isn't very important compared to
the developer/maintainer one.

> Any preferences ?
> thanks
> -- PMM

reply via email to

[Prev in Thread] Current Thread [Next in Thread]