Re: Arm Cortex M4 floating point

[vincent Dupaquis]

The core starts in priviledged mode, most probably you should do this at
startup.

Le 19/08/2020 à 13:25, Mircea Cociuba a écrit :
> hello, 
> This email will be non qemu related, but close to the original problem.
>
> I managed to get the FPU activation sequence to compile, found it on
> the ARM comunity site:
>
>     // ARM 100166_0001_00_en S7.3.2
>     __asm("ldr.w r0, =0xE000ED88"); // CPACR
>     __asm("ldr r1, [r0]");
>     __asm("orr r1, r1, 0xF << 20"); // [20:23] enable CP10 and CP11
>     __asm("str r1, [r0]"); 
>
> The documentation also specifies that this code must be executed in
> priviledged mode.
> There is little to no reference to priviledged mode in the Arm
> documentation.
> It briefly specifies that a certain CONTROL register must have a
> specific bit(nPriv) set to be in privileged mode.
> Where can I find the description of the is register and memory
> location? and are there specific instructions that work on it?
>
> /Mircea Cociuba/
> /"To be or not to be, that is not a question, it's FF"./
>
>
> On Tuesday, August 18, 2020, 06:35:33 PM GMT+3, Peter Maydell
> <peter.maydell@linaro.org> wrote:
>
>
> On Tue, 18 Aug 2020 at 15:02, Mircea Cociuba <cociuba_mircea@yahoo.com
> <mailto:cociuba_mircea@yahoo.com>> wrote:
> > gcc params: -Wall -Werror -O2 -nostdlib -nostartfiles
> -ffreestanding  -mcpu=cortex-m4 -mhard-float -mfpu=vfpv4-d16 (to make
> sure I have FPU instructions)
> >
> > the source code:
> >
> > void PUT32 ( unsigned int, unsigned int );
> > #define UART0BASE 0x4000C000
> >
> > int notmain ( void )
> > {
> >    unsigned int rx;
> >
> >
> >    unsigned char s[]="QEMU is not that interesting";
> >
> >    //dummy FPU command
> >    asm("vmov s15, r3"); // If you are to remove this, the qemu would
> print after I type the command continue in gdb, with this line, it
> shows nothing
>
> This looks like you're trying to use the FPU, but you haven't
> enabled it. If you're writing bare metal code then it is
> the job of your guest code to make sure it enables the FPU
> first, exactly as it has to do on real hardware. Check
> the Arm architecture reference manual for the details of
> how to do this (I think the main thing is writing to the
> CPACR to enable the FPU).
>
> Otherwise QEMU will correctly emulate the behaviour you
> get on real h/w if you try to use the FPU when it is disabled:
> the CPU takes an exception.
>
>
> thanks
> -- PMM
>
-- 

*Vincent Dupaquis*
Software security & Cryptography expert
06 24 58 17 05
/Europarc de Pichaury Bâtiment B8 1330 rue Guillibert de la Lauzière
13290 Aix-en-Provence/

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