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[PATCH for-6.0 0/2] mps3-an524: Fix MPC setting for SRAM block

From: Peter Maydell
Subject: [PATCH for-6.0 0/2] mps3-an524: Fix MPC setting for SRAM block
Date: Fri, 9 Apr 2021 16:05:25 +0100

The AN524 FPGA image has three MPCs: one for the BRAM, one for
the QSPI flash, and one for the DDR. In the an524_raminfo[] array
that defines the various RAM blocks on the board, we incorrectly
set the .mpc field for the SRAM to 1 as well as for the QSPI flash.
The effect of this was to cause the QSPI flash not to be mapped
at all (because when we mapped the 'upstream' end of each MPC,
we found the incorrectly marked SRAM entry before the QSPI one
when scanning through the raminfo array, and so put the upstream
end of MPC1 at the SRAM address).

Patch 1 fixes the SRAM block to use '.mpc = -1' indicating that
there is no associated MPC. Patch 2 adds an assert() that would
have caught this programming error (which is quite easy to make
if you're constructing the raminfo array for a new board by
copying and modifying entries from existing boards).

I think this makes sense to put into 6.0, it's a pretty safe change.

Peter Maydell (2):
  hw/arm/mps2-tz: Fix MPC setting for AN524 SRAM block
  hw/arm/mps2-tz: Assert if more than one RAM is attached to an MPC

 hw/arm/mps2-tz.c | 10 +++++++---
 1 file changed, 7 insertions(+), 3 deletions(-)


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