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[PATCH v5 79/81] target/arm: Implement aarch32 VSUDOT, VUSDOT
From: |
Richard Henderson |
Subject: |
[PATCH v5 79/81] target/arm: Implement aarch32 VSUDOT, VUSDOT |
Date: |
Fri, 16 Apr 2021 14:02:38 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/cpu.h | 5 +++++
target/arm/neon-shared.decode | 6 ++++++
target/arm/translate-neon.c.inc | 27 +++++++++++++++++++++++++++
3 files changed, 38 insertions(+)
diff --git a/target/arm/cpu.h b/target/arm/cpu.h
index a0865e224c..134dc65e34 100644
--- a/target/arm/cpu.h
+++ b/target/arm/cpu.h
@@ -3783,6 +3783,11 @@ static inline bool isar_feature_aa32_predinv(const
ARMISARegisters *id)
return FIELD_EX32(id->id_isar6, ID_ISAR6, SPECRES) != 0;
}
+static inline bool isar_feature_aa32_i8mm(const ARMISARegisters *id)
+{
+ return FIELD_EX32(id->id_isar6, ID_ISAR6, I8MM) != 0;
+}
+
static inline bool isar_feature_aa32_ras(const ARMISARegisters *id)
{
return FIELD_EX32(id->id_pfr0, ID_PFR0, RAS) != 0;
diff --git a/target/arm/neon-shared.decode b/target/arm/neon-shared.decode
index 2d94369750..5befaec87b 100644
--- a/target/arm/neon-shared.decode
+++ b/target/arm/neon-shared.decode
@@ -50,6 +50,8 @@ VSDOT 1111 110 00 . 10 .... .... 1101 . q:1 . 0 ....
\
vm=%vm_dp vn=%vn_dp vd=%vd_dp
VUDOT 1111 110 00 . 10 .... .... 1101 . q:1 . 1 .... \
vm=%vm_dp vn=%vn_dp vd=%vd_dp
+VUSDOT 1111 110 01 . 10 .... .... 1101 . q:1 . 0 .... \
+ vm=%vm_dp vn=%vn_dp vd=%vd_dp
# VFM[AS]L
VFML 1111 110 0 s:1 . 10 .... .... 1000 . 0 . 1 .... \
@@ -66,6 +68,10 @@ VSDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1
0 vm:4 \
vn=%vn_dp vd=%vd_dp
VUDOT_scalar 1111 1110 0 . 10 .... .... 1101 . q:1 index:1 1 vm:4 \
vn=%vn_dp vd=%vd_dp
+VUSDOT_scalar 1111 1110 1 . 00 .... .... 1101 . q:1 index:1 0 vm:4 \
+ vn=%vn_dp vd=%vd_dp
+VSUDOT_scalar 1111 1110 1 . 00 .... .... 1101 . q:1 index:1 1 vm:4 \
+ vn=%vn_dp vd=%vd_dp
%vfml_scalar_q0_rm 0:3 5:1
%vfml_scalar_q1_index 5:1 3:1
diff --git a/target/arm/translate-neon.c.inc b/target/arm/translate-neon.c.inc
index 2fd6478d3c..c322615915 100644
--- a/target/arm/translate-neon.c.inc
+++ b/target/arm/translate-neon.c.inc
@@ -278,6 +278,15 @@ static bool trans_VUDOT(DisasContext *s, arg_VUDOT *a)
gen_helper_gvec_udot_b);
}
+static bool trans_VUSDOT(DisasContext *s, arg_VUSDOT *a)
+{
+ if (!dc_isar_feature(aa32_i8mm, s)) {
+ return false;
+ }
+ return do_neon_ddda(s, a->q * 7, a->vd, a->vn, a->vm, 0,
+ gen_helper_gvec_usdot_b);
+}
+
static bool trans_VFML(DisasContext *s, arg_VFML *a)
{
int opr_sz;
@@ -345,6 +354,24 @@ static bool trans_VUDOT_scalar(DisasContext *s,
arg_VUDOT_scalar *a)
gen_helper_gvec_udot_idx_b);
}
+static bool trans_VUSDOT_scalar(DisasContext *s, arg_VUSDOT_scalar *a)
+{
+ if (!dc_isar_feature(aa32_i8mm, s)) {
+ return false;
+ }
+ return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index,
+ gen_helper_gvec_usdot_idx_b);
+}
+
+static bool trans_VSUDOT_scalar(DisasContext *s, arg_VSUDOT_scalar *a)
+{
+ if (!dc_isar_feature(aa32_i8mm, s)) {
+ return false;
+ }
+ return do_neon_ddda(s, a->q * 6, a->vd, a->vn, a->vm, a->index,
+ gen_helper_gvec_sudot_idx_b);
+}
+
static bool trans_VFML_scalar(DisasContext *s, arg_VFML_scalar *a)
{
int opr_sz;
--
2.25.1
- [PATCH v5 63/81] target/arm: Implement SVE2 crypto constructive binary operations, (continued)
- [PATCH v5 63/81] target/arm: Implement SVE2 crypto constructive binary operations, Richard Henderson, 2021/04/16
- [PATCH v5 70/81] target/arm: Implement SVE2 LD1RO, Richard Henderson, 2021/04/16
- [PATCH v5 71/81] target/arm: Implement 128-bit ZIP, UZP, TRN, Richard Henderson, 2021/04/16
- [PATCH v5 72/81] target/arm: Implement SVE2 bitwise shift immediate, Richard Henderson, 2021/04/16
- [PATCH v5 73/81] target/arm: Implement SVE2 fp multiply-add long, Richard Henderson, 2021/04/16
- [PATCH v5 75/81] target/arm: Split out do_neon_ddda_fpst, Richard Henderson, 2021/04/16
- [PATCH v5 74/81] target/arm: Implement aarch64 SUDOT, USDOT, Richard Henderson, 2021/04/16
- [PATCH v5 78/81] target/arm: Split decode of VSDOT and VUDOT, Richard Henderson, 2021/04/16
- [PATCH v5 76/81] target/arm: Remove unused fpst from VDOT_scalar, Richard Henderson, 2021/04/16
- [PATCH v5 77/81] target/arm: Fix decode for VDOT (indexed), Richard Henderson, 2021/04/16
- [PATCH v5 79/81] target/arm: Implement aarch32 VSUDOT, VUSDOT,
Richard Henderson <=
- [PATCH v5 80/81] target/arm: Implement integer matrix multiply accumulate, Richard Henderson, 2021/04/16
- [PATCH v5 81/81] target/arm: Enable SVE2 and some extensions, Richard Henderson, 2021/04/16
- Re: [PATCH v5 for-6.1 00/81] target/arm: Implement SVE2, no-reply, 2021/04/16