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Re: [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector)
From: |
Peter Maydell |
Subject: |
Re: [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector) |
Date: |
Thu, 10 Jun 2021 20:08:48 +0100 |
On Wed, 9 Jun 2021 at 21:20, Richard Henderson
<richard.henderson@linaro.org> wrote:
>
> On 6/7/21 9:58 AM, Peter Maydell wrote:
> > +++ b/target/arm/mve.decode
> > @@ -39,6 +39,8 @@
> > @1op_nosz .... .... .... .... .... .... .... .... &1op qd=%qd qm=%qm
> > size=0
> > @2op .... .... .. size:2 .... .... .... .... .... &2op qd=%qd qm=%qm
> > qn=%qn
> > @2op_nosz .... .... .... .... .... .... .... .... &2op qd=%qd qm=%qm
> > qn=%qn size=0
> > +@2op_sz28 .... .... .... .... .... .... .... .... &2op qd=%qd qm=%qm
> > qn=%qn \
> > + size=%size_28
>
> Move this back to VQDMULL[BT]_scalar, I think.
Why? VQDMULL[BT]_scalar uses an entirely different format
(as a scalar it uses the &2scalar arg struct with an rm field
for the gp register).
-- PMM
- [PATCH 42/55] target/arm: Implement MVE VQADD, VQSUB (vector), (continued)
- [PATCH 42/55] target/arm: Implement MVE VQADD, VQSUB (vector), Peter Maydell, 2021/06/07
- [PATCH 46/55] target/arm: Implement MVE VRSHL, Peter Maydell, 2021/06/07
- [PATCH 33/55] target/arm: Implement MVE VADD (scalar), Peter Maydell, 2021/06/07
- [PATCH 50/55] target/arm: Implement MVE VRHADD, Peter Maydell, 2021/06/07
- [PATCH 49/55] target/arm: Implement MVE VQDMULL (vector), Peter Maydell, 2021/06/07
- [PATCH 51/55] target/arm: Implement MVE VADC, VSBC, Peter Maydell, 2021/06/07
- [PATCH 52/55] target/arm: Implement MVE VCADD, Peter Maydell, 2021/06/07
- [PATCH 55/55] target/arm: Make VMOV scalar <-> gpreg beatwise for MVE, Peter Maydell, 2021/06/07
- [PATCH 53/55] target/arm: Implement MVE VHCADD, Peter Maydell, 2021/06/07