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Re: [PATCH] hw: timer: Add i.MX sysctr timer implementation
From: |
Philippe Mathieu-Daudé |
Subject: |
Re: [PATCH] hw: timer: Add i.MX sysctr timer implementation |
Date: |
Mon, 12 Jul 2021 16:21:08 +0200 |
User-agent: |
Mozilla/5.0 (X11; Linux x86_64; rv:78.0) Gecko/20100101 Thunderbird/78.11.0 |
On 7/12/21 4:02 PM, Peter Maydell wrote:
> On Mon, 12 Jul 2021 at 14:58, Daniel Baluta <daniel.baluta@gmail.com> wrote:
>>
>> On Wed, Jul 7, 2021 at 10:21 PM Peter Maydell <peter.maydell@linaro.org>
>> wrote:
>>>
>>> On Wed, 7 Jul 2021 at 12:39, Daniel Baluta <daniel.baluta@oss.nxp.com>
>>> wrote:
>>>>
>>>> From: Viorica Mancas <vioricamancas@yahoo.com>
>>>>
>>>> The System Counter (SYS_CTR) is a programmable system counter, which
>>>> provides a
>>>> shared time base to multiple processors. It is intended for applications
>>>> where the counter
>>>> is always powered on, and supports multiple unrelated clocks.
>>>>
>>>> This system counter can be found on NXP i.MX8MN.
>>>>
>>>> Signed-off-by: Viorica Mancas <vioricamancas@yahoo.com>
>>>> Signed-off-by: Daniel Baluta <daniel.baluta@nxp.com>
>>>
>>> Is there a board model or an update to an existing board that
>>> would use this device? We don't usually take device models that
>>> are completely unused upstream.
>>
>> Hi Peter,
>>
>> This can be found in i.MX8MN board. Should we add this patch together
>> with the upcoming patches for i.MX8?
>
> Yeah, you should start with a board model plus a minimal
> set of devices as the initial part to try to upstream.
And documentation/test for this new board, so others know how to
use your board, and tests will protect your code for regressions.