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[PATCH 23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn
From: |
Richard Henderson |
Subject: |
[PATCH 23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn |
Date: |
Tue, 26 Apr 2022 09:30:19 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 25 ++++++++++---------------
1 file changed, 10 insertions(+), 15 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index 9bd1b46a52..501192ed55 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -1845,24 +1845,21 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t
insn)
gen_op_iwmmxt_movq_M0_wRn(wrd);
switch ((insn >> 6) & 3) {
case 0:
- tmp2 = tcg_const_i32(0xff);
- tmp3 = tcg_const_i32((insn & 7) << 3);
+ tmp2 = tcg_constant_i32(0xff);
+ tmp3 = tcg_constant_i32((insn & 7) << 3);
break;
case 1:
- tmp2 = tcg_const_i32(0xffff);
- tmp3 = tcg_const_i32((insn & 3) << 4);
+ tmp2 = tcg_constant_i32(0xffff);
+ tmp3 = tcg_constant_i32((insn & 3) << 4);
break;
case 2:
- tmp2 = tcg_const_i32(0xffffffff);
- tmp3 = tcg_const_i32((insn & 1) << 5);
+ tmp2 = tcg_constant_i32(0xffffffff);
+ tmp3 = tcg_constant_i32((insn & 1) << 5);
break;
default:
- tmp2 = NULL;
- tmp3 = NULL;
+ g_assert_not_reached();
}
gen_helper_iwmmxt_insr(cpu_M0, cpu_M0, tmp, tmp2, tmp3);
- tcg_temp_free_i32(tmp3);
- tcg_temp_free_i32(tmp2);
tcg_temp_free_i32(tmp);
gen_op_iwmmxt_movq_wRn_M0(wrd);
gen_op_iwmmxt_set_mup();
@@ -2318,10 +2315,9 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t
insn)
rd0 = (insn >> 16) & 0xf;
rd1 = (insn >> 0) & 0xf;
gen_op_iwmmxt_movq_M0_wRn(rd0);
- tmp = tcg_const_i32((insn >> 20) & 3);
iwmmxt_load_reg(cpu_V1, rd1);
- gen_helper_iwmmxt_align(cpu_M0, cpu_M0, cpu_V1, tmp);
- tcg_temp_free_i32(tmp);
+ gen_helper_iwmmxt_align(cpu_M0, cpu_M0, cpu_V1,
+ tcg_constant_i32((insn >> 20) & 3));
gen_op_iwmmxt_movq_wRn_M0(wrd);
gen_op_iwmmxt_set_mup();
break;
@@ -2375,9 +2371,8 @@ static int disas_iwmmxt_insn(DisasContext *s, uint32_t
insn)
wrd = (insn >> 12) & 0xf;
rd0 = (insn >> 16) & 0xf;
gen_op_iwmmxt_movq_M0_wRn(rd0);
- tmp = tcg_const_i32(((insn >> 16) & 0xf0) | (insn & 0x0f));
+ tmp = tcg_constant_i32(((insn >> 16) & 0xf0) | (insn & 0x0f));
gen_helper_iwmmxt_shufh(cpu_M0, cpu_env, cpu_M0, tmp);
- tcg_temp_free_i32(tmp);
gen_op_iwmmxt_movq_wRn_M0(wrd);
gen_op_iwmmxt_set_mup();
gen_op_iwmmxt_set_cup();
--
2.34.1
- [PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders, (continued)
- [PATCH 20/47] target/arm: Use tcg_constant in 2misc expanders, Richard Henderson, 2022/04/26
- [PATCH 21/47] target/arm: Use tcg_constant in balance of translate-a64.c, Richard Henderson, 2022/04/26
- [PATCH 16/47] target/arm: Use tcg_constant in disas_data_proc_2src, Richard Henderson, 2022/04/26
- [PATCH 28/47] target/arm: Use tcg_constant for op_s_{rri,rxi}_rot, Richard Henderson, 2022/04/26
- [PATCH 26/47] target/arm: Use tcg_constant for do_coproc_insn, Richard Henderson, 2022/04/26
- [PATCH 23/47] target/arm: Use tcg_constant for disas_iwmmxt_insn,
Richard Henderson <=
- [PATCH 24/47] target/arm: Use tcg_constant for gen_{msr,mrs}, Richard Henderson, 2022/04/26
- [PATCH 27/47] target/arm: Use tcg_constant for gen_srs, Richard Henderson, 2022/04/26
- [PATCH 29/47] target/arm: Use tcg_constant for MOVW, UMAAL, CRC32, Richard Henderson, 2022/04/26
- [PATCH 34/47] target/arm: Use tcg_constant in trans_CPS_v7m, Richard Henderson, 2022/04/26
- [PATCH 33/47] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE, Richard Henderson, 2022/04/26