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[PATCH 22/47] target/arm: Use tcg_constant for aa32 exceptions
From: |
Richard Henderson |
Subject: |
[PATCH 22/47] target/arm: Use tcg_constant for aa32 exceptions |
Date: |
Tue, 26 Apr 2022 09:30:18 -0700 |
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
target/arm/translate.c | 32 +++++++-------------------------
1 file changed, 7 insertions(+), 25 deletions(-)
diff --git a/target/arm/translate.c b/target/arm/translate.c
index d09692c125..9bd1b46a52 100644
--- a/target/arm/translate.c
+++ b/target/arm/translate.c
@@ -346,9 +346,7 @@ static void store_sp_checked(DisasContext *s, TCGv_i32 var)
void gen_set_cpsr(TCGv_i32 var, uint32_t mask)
{
- TCGv_i32 tmp_mask = tcg_const_i32(mask);
- gen_helper_cpsr_write(cpu_env, var, tmp_mask);
- tcg_temp_free_i32(tmp_mask);
+ gen_helper_cpsr_write(cpu_env, var, tcg_constant_i32(mask));
}
static void gen_rebuild_hflags(DisasContext *s, bool new_el)
@@ -373,11 +371,8 @@ static void gen_rebuild_hflags(DisasContext *s, bool
new_el)
static void gen_exception_internal(int excp)
{
- TCGv_i32 tcg_excp = tcg_const_i32(excp);
-
assert(excp_is_internal(excp));
- gen_helper_exception_internal(cpu_env, tcg_excp);
- tcg_temp_free_i32(tcg_excp);
+ gen_helper_exception_internal(cpu_env, tcg_constant_i32(excp));
}
static void gen_singlestep_exception(DisasContext *s)
@@ -1078,12 +1073,8 @@ static inline void gen_smc(DisasContext *s)
/* As with HVC, we may take an exception either before or after
* the insn executes.
*/
- TCGv_i32 tmp;
-
gen_set_pc_im(s, s->pc_curr);
- tmp = tcg_const_i32(syn_aa32_smc());
- gen_helper_pre_smc(cpu_env, tmp);
- tcg_temp_free_i32(tmp);
+ gen_helper_pre_smc(cpu_env, tcg_constant_i32(syn_aa32_smc()));
gen_set_pc_im(s, s->base.pc_next);
s->base.is_jmp = DISAS_SMC;
}
@@ -1111,13 +1102,9 @@ void gen_exception_insn(DisasContext *s, uint64_t pc,
int excp,
static void gen_exception_bkpt_insn(DisasContext *s, uint32_t syn)
{
- TCGv_i32 tcg_syn;
-
gen_set_condexec(s);
gen_set_pc_im(s, s->pc_curr);
- tcg_syn = tcg_const_i32(syn);
- gen_helper_exception_bkpt_insn(cpu_env, tcg_syn);
- tcg_temp_free_i32(tcg_syn);
+ gen_helper_exception_bkpt_insn(cpu_env, tcg_constant_i32(syn));
s->base.is_jmp = DISAS_NORETURN;
}
@@ -1131,16 +1118,11 @@ void unallocated_encoding(DisasContext *s)
static void gen_exception_el(DisasContext *s, int excp, uint32_t syn,
TCGv_i32 tcg_el)
{
- TCGv_i32 tcg_excp;
- TCGv_i32 tcg_syn;
-
gen_set_condexec(s);
gen_set_pc_im(s, s->pc_curr);
- tcg_excp = tcg_const_i32(excp);
- tcg_syn = tcg_const_i32(syn);
- gen_helper_exception_with_syndrome(cpu_env, tcg_excp, tcg_syn, tcg_el);
- tcg_temp_free_i32(tcg_syn);
- tcg_temp_free_i32(tcg_excp);
+ gen_helper_exception_with_syndrome(cpu_env,
+ tcg_constant_i32(excp),
+ tcg_constant_i32(syn), tcg_el);
s->base.is_jmp = DISAS_NORETURN;
}
--
2.34.1
- [PATCH 24/47] target/arm: Use tcg_constant for gen_{msr,mrs}, (continued)
- [PATCH 24/47] target/arm: Use tcg_constant for gen_{msr,mrs}, Richard Henderson, 2022/04/26
- [PATCH 27/47] target/arm: Use tcg_constant for gen_srs, Richard Henderson, 2022/04/26
- [PATCH 29/47] target/arm: Use tcg_constant for MOVW, UMAAL, CRC32, Richard Henderson, 2022/04/26
- [PATCH 34/47] target/arm: Use tcg_constant in trans_CPS_v7m, Richard Henderson, 2022/04/26
- [PATCH 33/47] target/arm: Use tcg_constant in CLRM, DLS, WLS, LE, Richard Henderson, 2022/04/26
- [PATCH 22/47] target/arm: Use tcg_constant for aa32 exceptions,
Richard Henderson <=
- [PATCH 25/47] target/arm: Use tcg_constant for vector shift expanders, Richard Henderson, 2022/04/26
- [PATCH 32/47] target/arm: Use tcg_constant in LDM, STM, Richard Henderson, 2022/04/26
- [PATCH 31/47] target/arm: Use tcg_constant for TT, SAT, SMMLA, Richard Henderson, 2022/04/26
- [PATCH 39/47] target/arm: Use tcg_constant in {incr, wrap}_last_active, Richard Henderson, 2022/04/26
- [PATCH 38/47] target/arm: Use tcg_constant in FCPY, CPY, Richard Henderson, 2022/04/26