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Re: [PATCH v6 24/24] target/arm: Define neoverse-n1

From: Peter Maydell
Subject: Re: [PATCH v6 24/24] target/arm: Define neoverse-n1
Date: Wed, 10 Aug 2022 17:47:58 +0100

On Wed, 10 Aug 2022 at 14:14, Zenghui Yu <yuzenghui@huawei.com> wrote:
> The r4p1 TRM says that the Neoverse N1 core supports SPE (the value
> of ID_AA64DFR0.PMSVer is 0b0001) but do we really support SPE
> emulation in QEMU?
> The guest immediately received an unexpected exception (with EC==0,
> at EFI stage) when I tried to boot it using something like:
> /path/to/qemu-system-aarch64 \
> -M virt,gic-version=3,virtualization=on \
> -cpu neoverse-n1 -accel tcg \
> -bios QEMU_EFI.fd [...]
> and QEMU shouted that "read access to unsupported AArch64 system
> register op0:3 op1:0 crn:9 crm:10 op2:7", which told us that the
> guest attempted to read the PMBIDR_EL1 register.

No, we don't emulate SPE. We should probably not advertise it
(we might do a no-op implementation eventually).

What guest is this ?

-- PMM

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