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Re: [PATCH v2 00/10] target/arm: Implement FEAT_PMUv3p5

From: Richard Henderson
Subject: Re: [PATCH v2 00/10] target/arm: Implement FEAT_PMUv3p5
Date: Tue, 23 Aug 2022 14:53:05 -0700

On Mon, 22 Aug 2022 at 06:24, Peter Maydell <peter.maydell@linaro.org> wrote:
> This patchset implements the Armv8.5 feature FEAT_PMUv3p5, which is
> a set of minor enhancements to the PMU:
>  * EL2 and EL3 can now prohibit the cycle counter from counting
>    when in EL2 or when Secure, using new MDCR_EL2.HCCD and
>    MDCR_EL3.SCCD bits
>  * event counters are now 64 bits, with the overflow detection
>    configurably at the 32 bit or 64 bit mark
> It also fixes a set of bugs in the existing PMU emulation which I
> discovered while trying to test my additions.
> This is of course all intended for 7.2.
> Changes v1->v2:
>  * fixed indent error, comment typo
>  * a non-change: opted not to use bitwise |= for bool
>  * fixed patch 8 to implement MDCR_EL3.SCCD, not some
>    weird mix of MCCD and SCCD
>  * update emulation.rst to note feature is implemented
> Patch 8 is the only one that needs review.

Thanks, queued to target-arm.next.


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