Re: [PATCH] hw/arm/aspeed: increase Bletchley memory size

[Cédric Le Goater]

On 10/7/22 00:52, Patrick Williams wrote:
> For the PVT-class hardware we have increased the memory size of
> this device to 2 GiB.  Adjust the device model accordingly.

You should add some defines similar to  :

    /* On 32-bit hosts, lower RAM to 1G because of the 2047 MB limit */
    #if HOST_LONG_BITS == 32
    #define FUJI_BMC_RAM_SIZE (1 * GiB)
    #else
    #define FUJI_BMC_RAM_SIZE (2 * GiB)
    #endif
    
or are we done with 32bit hosts ?

Thanks,

C.

> Signed-off-by: Patrick Williams <patrick@stwcx.xyz>
> ---
>   hw/arm/aspeed.c | 2 +-
>   1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c
> index 7d2162c6ed..ab5725fff1 100644
> --- a/hw/arm/aspeed.c
> +++ b/hw/arm/aspeed.c
> @@ -1344,7 +1344,7 @@ static void 
> aspeed_machine_bletchley_class_init(ObjectClass *oc, void *data)
>       amc->num_cs    = 2;
>       amc->macs_mask = ASPEED_MAC2_ON;
>       amc->i2c_init  = bletchley_bmc_i2c_init;
> -    mc->default_ram_size = 512 * MiB;
> +    mc->default_ram_size = 2 * GiB;
>       mc->default_cpus = mc->min_cpus = mc->max_cpus =
>           aspeed_soc_num_cpus(amc->soc_name);
>   }