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[PATCH 00/20] target/arm: CONFIG_TCG=n part 1
From: |
Fabiano Rosas |
Subject: |
[PATCH 00/20] target/arm: CONFIG_TCG=n part 1 |
Date: |
Wed, 18 Jan 2023 16:34:58 -0300 |
These are the already reviewed patches from the first half of my
previous series:
20230113140419.4013-1-farosas@suse.de">https://lore.kernel.org/r/20230113140419.4013-1-farosas@suse.de
This unbreaks the --disable-tcg build, but there are issues in runtime
that are still being hashed out in the other series.
For the build _with_ TCG, this should behave the same as master.
Based on Richard's "target/arm: Introduce aarch64_set_svcr":
https://lore.kernel.org/r/20230112004322.161330-1-richard.henderson@linaro.org
Claudio Fontana (5):
target/arm: rename handle_semihosting to tcg_handle_semihosting
target/arm: wrap psci call with tcg_enabled
target/arm: wrap call to aarch64_sve_change_el in tcg_enabled()
target/arm: move helpers to tcg/
target/arm: Move psci.c into the tcg directory
Fabiano Rosas (15):
target/arm: Move PC alignment check
target/arm: Move cpregs code out of cpu.h
target/arm: Move cpregs code into cpregs.c
target/arm: Move define_debug_regs() to cpregs.c
target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled
target/arm: move translate modules to tcg/
target/arm: Wrap arm_rebuild_hflags calls with tcg_enabled
target/arm: Move hflags code into the tcg directory
target/arm: Move regime_using_lpae_format into internal.h
target/arm: Don't access TCG code when debugging with KVM
cpu-defs.h: Expose CPUTLBEntryFull to non-TCG code
target/arm: Move cortex sysregs into cpregs.c
tests/qtest: Restrict bcm2835-dma-test to CONFIG_RASPI
tests/avocado: Skip tests that require a missing accelerator
tests/avocado: Tag TCG tests with accel:tcg
MAINTAINERS | 1 +
hw/arm/boot.c | 6 +-
hw/intc/armv7m_nvic.c | 20 +-
include/exec/cpu-defs.h | 6 +
target/arm/arm-powerctl.c | 7 +-
target/arm/cpregs.c | 9533 +++++++++++++++++++++++
target/arm/cpregs.h | 104 +
target/arm/cpu.c | 9 +-
target/arm/cpu.h | 91 -
target/arm/cpu64.c | 1 +
target/arm/cpu_tcg.c | 59 -
target/arm/helper.c | 9461 +---------------------
target/arm/internals.h | 38 +-
target/arm/machine.c | 30 +-
target/arm/meson.build | 48 +-
target/arm/ptw.c | 4 +
target/arm/tcg-stubs.c | 27 +
target/arm/{ => tcg}/a32-uncond.decode | 0
target/arm/{ => tcg}/a32.decode | 0
target/arm/{ => tcg}/crypto_helper.c | 0
target/arm/{ => tcg}/debug_helper.c | 367 -
target/arm/{ => tcg}/helper-a64.c | 0
target/arm/tcg/hflags.c | 370 +
target/arm/{ => tcg}/iwmmxt_helper.c | 0
target/arm/{ => tcg}/m-nocp.decode | 0
target/arm/{ => tcg}/m_helper.c | 0
target/arm/tcg/meson.build | 51 +
target/arm/{ => tcg}/mte_helper.c | 0
target/arm/{ => tcg}/mve.decode | 0
target/arm/{ => tcg}/mve_helper.c | 0
target/arm/{ => tcg}/neon-dp.decode | 0
target/arm/{ => tcg}/neon-ls.decode | 0
target/arm/{ => tcg}/neon-shared.decode | 0
target/arm/{ => tcg}/neon_helper.c | 0
target/arm/{ => tcg}/op_helper.c | 0
target/arm/{ => tcg}/pauth_helper.c | 0
target/arm/{ => tcg}/psci.c | 0
target/arm/{ => tcg}/sme-fa64.decode | 0
target/arm/{ => tcg}/sme.decode | 0
target/arm/{ => tcg}/sme_helper.c | 0
target/arm/{ => tcg}/sve.decode | 0
target/arm/{ => tcg}/sve_helper.c | 0
target/arm/{ => tcg}/t16.decode | 0
target/arm/{ => tcg}/t32.decode | 0
target/arm/{ => tcg}/tlb_helper.c | 18 -
target/arm/{ => tcg}/translate-a64.c | 0
target/arm/{ => tcg}/translate-a64.h | 0
target/arm/{ => tcg}/translate-m-nocp.c | 0
target/arm/{ => tcg}/translate-mve.c | 0
target/arm/{ => tcg}/translate-neon.c | 0
target/arm/{ => tcg}/translate-sme.c | 0
target/arm/{ => tcg}/translate-sve.c | 0
target/arm/{ => tcg}/translate-vfp.c | 0
target/arm/{ => tcg}/translate.c | 0
target/arm/{ => tcg}/translate.h | 0
target/arm/{ => tcg}/vec_helper.c | 0
target/arm/{ => tcg}/vec_internal.h | 0
target/arm/{ => tcg}/vfp-uncond.decode | 0
target/arm/{ => tcg}/vfp.decode | 0
target/arm/trace-events | 2 +-
tests/avocado/avocado_qemu/__init__.py | 4 +
tests/avocado/boot_linux_console.py | 1 +
tests/avocado/reverse_debugging.py | 8 +
tests/qtest/meson.build | 4 +-
64 files changed, 10210 insertions(+), 10060 deletions(-)
create mode 100644 target/arm/cpregs.c
create mode 100644 target/arm/tcg-stubs.c
rename target/arm/{ => tcg}/a32-uncond.decode (100%)
rename target/arm/{ => tcg}/a32.decode (100%)
rename target/arm/{ => tcg}/crypto_helper.c (100%)
rename target/arm/{ => tcg}/debug_helper.c (63%)
rename target/arm/{ => tcg}/helper-a64.c (100%)
create mode 100644 target/arm/tcg/hflags.c
rename target/arm/{ => tcg}/iwmmxt_helper.c (100%)
rename target/arm/{ => tcg}/m-nocp.decode (100%)
rename target/arm/{ => tcg}/m_helper.c (100%)
create mode 100644 target/arm/tcg/meson.build
rename target/arm/{ => tcg}/mte_helper.c (100%)
rename target/arm/{ => tcg}/mve.decode (100%)
rename target/arm/{ => tcg}/mve_helper.c (100%)
rename target/arm/{ => tcg}/neon-dp.decode (100%)
rename target/arm/{ => tcg}/neon-ls.decode (100%)
rename target/arm/{ => tcg}/neon-shared.decode (100%)
rename target/arm/{ => tcg}/neon_helper.c (100%)
rename target/arm/{ => tcg}/op_helper.c (100%)
rename target/arm/{ => tcg}/pauth_helper.c (100%)
rename target/arm/{ => tcg}/psci.c (100%)
rename target/arm/{ => tcg}/sme-fa64.decode (100%)
rename target/arm/{ => tcg}/sme.decode (100%)
rename target/arm/{ => tcg}/sme_helper.c (100%)
rename target/arm/{ => tcg}/sve.decode (100%)
rename target/arm/{ => tcg}/sve_helper.c (100%)
rename target/arm/{ => tcg}/t16.decode (100%)
rename target/arm/{ => tcg}/t32.decode (100%)
rename target/arm/{ => tcg}/tlb_helper.c (94%)
rename target/arm/{ => tcg}/translate-a64.c (100%)
rename target/arm/{ => tcg}/translate-a64.h (100%)
rename target/arm/{ => tcg}/translate-m-nocp.c (100%)
rename target/arm/{ => tcg}/translate-mve.c (100%)
rename target/arm/{ => tcg}/translate-neon.c (100%)
rename target/arm/{ => tcg}/translate-sme.c (100%)
rename target/arm/{ => tcg}/translate-sve.c (100%)
rename target/arm/{ => tcg}/translate-vfp.c (100%)
rename target/arm/{ => tcg}/translate.c (100%)
rename target/arm/{ => tcg}/translate.h (100%)
rename target/arm/{ => tcg}/vec_helper.c (100%)
rename target/arm/{ => tcg}/vec_internal.h (100%)
rename target/arm/{ => tcg}/vfp-uncond.decode (100%)
rename target/arm/{ => tcg}/vfp.decode (100%)
--
2.35.3
- [PATCH 00/20] target/arm: CONFIG_TCG=n part 1,
Fabiano Rosas <=
- [PATCH 01/20] target/arm: rename handle_semihosting to tcg_handle_semihosting, Fabiano Rosas, 2023/01/18
- [PATCH 03/20] target/arm: wrap call to aarch64_sve_change_el in tcg_enabled(), Fabiano Rosas, 2023/01/18
- [PATCH 02/20] target/arm: wrap psci call with tcg_enabled, Fabiano Rosas, 2023/01/18
- [PATCH 07/20] target/arm: Move define_debug_regs() to cpregs.c, Fabiano Rosas, 2023/01/18
- [PATCH 05/20] target/arm: Move cpregs code out of cpu.h, Fabiano Rosas, 2023/01/18
- [PATCH 06/20] target/arm: Move cpregs code into cpregs.c, Fabiano Rosas, 2023/01/18
- [PATCH 04/20] target/arm: Move PC alignment check, Fabiano Rosas, 2023/01/18
- [PATCH 08/20] target/arm: Wrap breakpoint/watchpoint updates with tcg_enabled, Fabiano Rosas, 2023/01/18
- [PATCH 09/20] target/arm: move translate modules to tcg/, Fabiano Rosas, 2023/01/18
- [PATCH 11/20] target/arm: Move psci.c into the tcg directory, Fabiano Rosas, 2023/01/18