Re: [PATCH] target/arm: Allow users to set the number of VFP registers

[Cédric Le Goater]

> > @@ -1650,6 +1656,14 @@ static void arm_cpu_realizefn(DeviceState *dev, Error 
> > **errp)
> >           return;
> >       }
> >
> > +    if (!cpu->has_vfp_d32) {
> > +        uint32_t u;
> > +
> > +        u = cpu->isar.mvfr0;
> > +        u = FIELD_DP32(u, MVFR0, SIMDREG, 1); /* 16 registers */
> > +        cpu->isar.mvfr0 = u;
> > +    }
> > +
> >       if (!cpu->has_vfp) {
> >           uint64_t t;
> >           uint32_t u;
>
> There should be a check so the user can't both disable D32 and enable Neon
> (Neon always has 32 dregs).
>
> Armv8A doesn't permit D16, so we shouldn't allow that combination either
> (but note that v8R, support for which just landed, *does* permit it).

Like below ?

Thanks,

C.


@@ -1661,6 +1672,26 @@ static void arm_cpu_realizefn(DeviceStat
         return;
     }
 
+    if (!cpu->has_vfp_d32 &&
+        arm_feature(env, ARM_FEATURE_V8) &&
+        !arm_feature(env, ARM_FEATURE_M)) {
+        error_setg(errp, "ARMv8A CPUs must have VFP32");
+        return;
+    }
+
+    if (cpu->has_vfp_d32 != cpu->has_neon) {
+        error_setg(errp, "ARM CPUs must have both VFP32 and Neon or neither");
+        return;
+    }
+
+   if (!cpu->has_vfp_d32) {
+        uint32_t u;
+
+        u = cpu->isar.mvfr0;
+        u = FIELD_DP32(u, MVFR0, SIMDREG, 1); /* 16 registers */
+        cpu->isar.mvfr0 = u;
+    }
+
     if (!cpu->has_vfp) {
         uint64_t t;
         uint32_t u;