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From: | Cédric Le Goater |
Subject: | Re: [PATCH 2/5] aspeed: ast27x0: Map unimplemented devices in SoC memory |
Date: | Fri, 3 Jan 2025 18:36:07 +0100 |
User-agent: | Mozilla Thunderbird |
On 1/3/25 10:57, Steven Lee wrote:
Hi Cédric,-----Original Message----- From: Cédric Le Goater <clg@kaod.org> Sent: Friday, January 3, 2025 5:44 PM To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin <jamin_lin@aspeedtech.com>; Andrew Jeffery <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here <qemu-devel@nongnu.org> Cc: Troy Lee <troy_lee@aspeedtech.com>; Yunlin Tang <yunlin.tang@aspeedtech.com> Subject: Re: [PATCH 2/5] aspeed: ast27x0: Map unimplemented devices in SoC memory On 1/3/25 09:14, Steven Lee wrote:Hi Cédric,-----Original Message----- From: Cédric Le Goater <clg@kaod.org> Sent: Friday, December 27, 2024 5:53 PM To: Steven Lee <steven_lee@aspeedtech.com>; Peter Maydell <peter.maydell@linaro.org>; Troy Lee <leetroy@gmail.com>; Jamin Lin <jamin_lin@aspeedtech.com>; Andrew Jeffery <andrew@codeconstruct.com.au>; Joel Stanley <joel@jms.id.au>; open list:ASPEED BMCs <qemu-arm@nongnu.org>; open list:All patches CC here <qemu-devel@nongnu.org> Cc: Troy Lee <troy_lee@aspeedtech.com>; Yunlin Tang <yunlin.tang@aspeedtech.com> Subject: Re: [PATCH 2/5] aspeed: ast27x0: Map unimplemented devices in SoC memory Hello, On 12/25/24 03:03, Steven Lee wrote:Maps following unimplemented devices in SoC memory - dpmcu - iomem0 - iomem1 - ltpi - ioCould you please add a sentence about what these devices are ? Thanks, C.DPMCU stands for Display Port MCU controller. Regarding LTPI, when the AST1700 is connected to the AST2700, AST1070LTPI controller's registers are mapped to 0x30000000. Is the LTPI IP a device for communication between SoCs ?Yes, it can be used to connect to AST1700. AST1700 is an I/O expander that supports the DC-SCM 2.1 LTPI protocol. It provides AST2700 with additional GPIO, UART, I3C, and other interfaces.
This is the kind of information which would be useful to add to the description of the SoC/machine and in the commit log. Thanks, C.
Thanks, StevenIo, Iomem0 and Iomem1 include unimplemented controllers in the memoryranges 0x120000000 - 0x121000000 and 0x14000000 - 0x141000000.For instance: - USB hub at 0x12010000 - eSPI at 0x14C5000 - PWM at 0x140C0000 I will include the description in the commit message.yes please. Thanks, C.
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