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Re: [PATCH v2 01/13] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate
From: |
Bernhard Beschow |
Subject: |
Re: [PATCH v2 01/13] hw/sd/sdhci: Set SDHC_NIS_DMA bit when appropriate |
Date: |
Thu, 16 Jan 2025 23:39:03 +0000 |
Am 15. Januar 2025 12:55:29 UTC schrieb Michael Tokarev <mjt@tls.msk.ru>:
>11.01.2025 21:36, Bernhard Beschow wrote:
>> In U-Boot, the fsl_esdhc[_imx] driver waits for both "transmit completed" and
>> "DMA" bits in esdhc_send_cmd_common() by means of DATA_COMPLETE constant.
>> QEMU
>> currently misses to set the DMA bit which causes the driver to loop forever.
>> Fix
>> that by setting the DMA bit if enabled when doing DMA block transfers.
>>
>> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>
>Is this a qemu-stable material?
Good question. Given that this part of the code has some further issues [1] I'd
rather not alter stable behavior because we might just trade one bug for
another.
Best regards,
Bernhard
[1]
<https://lore.kernel.org/qemu-devel/4b846383-83bf-4252-a172-95604f2f585b@linaro.org/>
>
>Thanks,
>
>/mjt
[PATCH v2 05/13] hw/gpio/imx_gpio: Don't clear input GPIO values upon reset, Bernhard Beschow, 2025/01/11