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Re: [PATCH v5 13/26] nvme: additional tracing
From: |
Maxim Levitsky |
Subject: |
Re: [PATCH v5 13/26] nvme: additional tracing |
Date: |
Wed, 12 Feb 2020 12:28:29 +0200 |
On Tue, 2020-02-04 at 10:51 +0100, Klaus Jensen wrote:
> Add a trace call for nvme_enqueue_req_completion.
>
> Also, streamline nvme_identify_ns and nvme_identify_ns_list. They do not
> need to repeat the command, it is already in the trace name.
>
> Signed-off-by: Klaus Jensen <address@hidden>
> ---
> hw/block/nvme.c | 8 +++++---
> hw/block/trace-events | 5 +++--
> 2 files changed, 8 insertions(+), 5 deletions(-)
>
> diff --git a/hw/block/nvme.c b/hw/block/nvme.c
> index 3267ee2de47a..30c5b3e7a67d 100644
> --- a/hw/block/nvme.c
> +++ b/hw/block/nvme.c
> @@ -320,6 +320,8 @@ static void nvme_post_cqes(void *opaque)
> static void nvme_enqueue_req_completion(NvmeCQueue *cq, NvmeRequest *req)
> {
> assert(cq->cqid == req->sq->cqid);
> + trace_nvme_dev_enqueue_req_completion(nvme_cid(req), cq->cqid,
> + req->status);
Split line alignment on that '('
> QTAILQ_REMOVE(&req->sq->out_req_list, req, entry);
> QTAILQ_INSERT_TAIL(&cq->req_list, req, entry);
> timer_mod(cq->timer, qemu_clock_get_ns(QEMU_CLOCK_VIRTUAL) + 500);
> @@ -895,7 +897,7 @@ static uint16_t nvme_identify_ns(NvmeCtrl *n,
> NvmeIdentify *c)
> prp1, prp2);
> }
>
> -static uint16_t nvme_identify_nslist(NvmeCtrl *n, NvmeIdentify *c)
> +static uint16_t nvme_identify_ns_list(NvmeCtrl *n, NvmeIdentify *c)
> {
> static const int data_len = 4 * KiB;
> uint32_t min_nsid = le32_to_cpu(c->nsid);
> @@ -905,7 +907,7 @@ static uint16_t nvme_identify_nslist(NvmeCtrl *n,
> NvmeIdentify *c)
> uint16_t ret;
> int i, j = 0;
>
> - trace_nvme_dev_identify_nslist(min_nsid);
> + trace_nvme_dev_identify_ns_list(min_nsid);
>
> list = g_malloc0(data_len);
> for (i = 0; i < n->num_namespaces; i++) {
> @@ -932,7 +934,7 @@ static uint16_t nvme_identify(NvmeCtrl *n, NvmeCmd *cmd)
> case 0x01:
> return nvme_identify_ctrl(n, c);
> case 0x02:
> - return nvme_identify_nslist(n, c);
> + return nvme_identify_ns_list(n, c);
> default:
> trace_nvme_dev_err_invalid_identify_cns(le32_to_cpu(c->cns));
> return NVME_INVALID_FIELD | NVME_DNR;
> diff --git a/hw/block/trace-events b/hw/block/trace-events
> index 4cf39961989d..f982ec1a3221 100644
> --- a/hw/block/trace-events
> +++ b/hw/block/trace-events
> @@ -39,8 +39,8 @@ nvme_dev_create_cq(uint64_t addr, uint16_t cqid, uint16_t
> vector, uint16_t size,
> nvme_dev_del_sq(uint16_t qid) "deleting submission queue sqid=%"PRIu16""
> nvme_dev_del_cq(uint16_t cqid) "deleted completion queue, sqid=%"PRIu16""
> nvme_dev_identify_ctrl(void) "identify controller"
> -nvme_dev_identify_ns(uint16_t ns) "identify namespace, nsid=%"PRIu16""
> -nvme_dev_identify_nslist(uint16_t ns) "identify namespace list,
> nsid=%"PRIu16""
> +nvme_dev_identify_ns(uint32_t ns) "nsid %"PRIu32""
> +nvme_dev_identify_ns_list(uint32_t ns) "nsid %"PRIu32""
> nvme_dev_getfeat(uint16_t cid, uint32_t fid) "cid %"PRIu16" fid 0x%"PRIx32""
> nvme_dev_setfeat(uint16_t cid, uint32_t fid, uint32_t val) "cid %"PRIu16"
> fid 0x%"PRIx32" val 0x%"PRIx32""
> nvme_dev_getfeat_vwcache(const char* result) "get feature volatile write
> cache, result=%s"
> @@ -54,6 +54,7 @@ nvme_dev_aer(uint16_t cid) "cid %"PRIu16""
> nvme_dev_aer_aerl_exceeded(void) "aerl exceeded"
> nvme_dev_aer_masked(uint8_t type, uint8_t mask) "type 0x%"PRIx8" mask
> 0x%"PRIx8""
> nvme_dev_aer_post_cqe(uint8_t typ, uint8_t info, uint8_t log_page) "type
> 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8""
> +nvme_dev_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint16_t
> status) "cid %"PRIu16" cqid %"PRIu16" status 0x%"PRIx16""
> nvme_dev_enqueue_event(uint8_t typ, uint8_t info, uint8_t log_page) "type
> 0x%"PRIx8" info 0x%"PRIx8" lid 0x%"PRIx8""
> nvme_dev_enqueue_event_noqueue(int queued) "queued %d"
> nvme_dev_enqueue_event_masked(uint8_t typ) "type 0x%"PRIx8""
With alignment fixed:
Reviewed-by: Maxim Levitsky <address@hidden>
Best regards,
Maxim Levitsky
- Re: [PATCH v5 09/26] nvme: add temperature threshold feature, (continued)
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