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Re: [PATCH v6 07/20] hw/block/nvme: fix pin-based interrupt behavior


From: Klaus Jensen
Subject: Re: [PATCH v6 07/20] hw/block/nvme: fix pin-based interrupt behavior
Date: Mon, 25 May 2020 10:20:34 +0200

On May 18 07:02, Klaus Jensen wrote:
> On May 14 06:45, Klaus Jensen wrote:
> > From: Klaus Jensen <address@hidden>
> > 
> > First, since the device only supports MSI-X or pin-based interrupt, if
> > MSI-X is not enabled, it should not accept interrupt vectors different
> > from 0 when creating completion queues.
> > 
> > Secondly, the irq_status NvmeCtrl member is meant to be compared to the
> > INTMS register, so it should only be 32 bits wide. And it is really only
> > useful when used with multi-message MSI.
> > 
> > Third, since we do not force a 1-to-1 correspondence between cqid and
> > interrupt vector, the irq_status register should not have bits set
> > according to cqid, but according to the associated interrupt vector.
> > 
> > Fix these issues, but keep irq_status available so we can easily support
> > multi-message MSI down the line.
> > 
> > Fixes: 5e9aa92eb1a5 ("hw/block: Fix pin-based interrupt behaviour of NVMe")
> > Cc: "Michael S. Tsirkin" <address@hidden>
> > Cc: Marcel Apfelbaum <address@hidden>
> > Signed-off-by: Klaus Jensen <address@hidden>
> > ---
> >  hw/block/nvme.c | 12 ++++++++----
> >  hw/block/nvme.h |  2 +-
> >  2 files changed, 9 insertions(+), 5 deletions(-)
> > 
> 
> Gentle ping on this and [PATCH v6 08/20].
> 
 
And another ping :)



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