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Re: [PATCH 19/22] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal
From: |
Alistair Francis |
Subject: |
Re: [PATCH 19/22] hw/riscv: sifive_u: Change SIFIVE_U_GEM_IRQ to decimal value |
Date: |
Wed, 13 Jan 2021 10:33:00 -0800 |
On Thu, Dec 31, 2020 at 3:38 AM Bin Meng <bmeng.cn@gmail.com> wrote:
>
> From: Bin Meng <bin.meng@windriver.com>
>
> All other peripherals' IRQs are in the format of decimal value.
> Change SIFIVE_U_GEM_IRQ to be consistent.
>
> Signed-off-by: Bin Meng <bin.meng@windriver.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Alistair
> ---
>
> include/hw/riscv/sifive_u.h | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/hw/riscv/sifive_u.h b/include/hw/riscv/sifive_u.h
> index de1464a2ce..2656b39808 100644
> --- a/include/hw/riscv/sifive_u.h
> +++ b/include/hw/riscv/sifive_u.h
> @@ -127,7 +127,7 @@ enum {
> SIFIVE_U_PDMA_IRQ6 = 29,
> SIFIVE_U_PDMA_IRQ7 = 30,
> SIFIVE_U_QSPI0_IRQ = 51,
> - SIFIVE_U_GEM_IRQ = 0x35
> + SIFIVE_U_GEM_IRQ = 53
> };
>
> enum {
> --
> 2.25.1
>
>
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