[Date Prev][Date Next][Thread Prev][Thread Next][Date Index][Thread Index]
[PATCH v2 01/12] hw/block/nvme: add size to mmio read/write trace events
From: |
Klaus Jensen |
Subject: |
[PATCH v2 01/12] hw/block/nvme: add size to mmio read/write trace events |
Date: |
Mon, 18 Jan 2021 10:46:54 +0100 |
From: Klaus Jensen <k.jensen@samsung.com>
Add the size of the mmio read/write to the trace event.
Signed-off-by: Klaus Jensen <k.jensen@samsung.com>
---
hw/block/nvme.c | 4 ++--
hw/block/trace-events | 4 ++--
2 files changed, 4 insertions(+), 4 deletions(-)
diff --git a/hw/block/nvme.c b/hw/block/nvme.c
index 47da73ce2364..bd7e258c3c26 100644
--- a/hw/block/nvme.c
+++ b/hw/block/nvme.c
@@ -3840,7 +3840,7 @@ static uint64_t nvme_mmio_read(void *opaque, hwaddr addr,
unsigned size)
uint8_t *ptr = (uint8_t *)&n->bar;
uint64_t val = 0;
- trace_pci_nvme_mmio_read(addr);
+ trace_pci_nvme_mmio_read(addr, size);
if (unlikely(addr & (sizeof(uint32_t) - 1))) {
NVME_GUEST_ERR(pci_nvme_ub_mmiord_misaligned32,
@@ -4004,7 +4004,7 @@ static void nvme_mmio_write(void *opaque, hwaddr addr,
uint64_t data,
{
NvmeCtrl *n = (NvmeCtrl *)opaque;
- trace_pci_nvme_mmio_write(addr, data);
+ trace_pci_nvme_mmio_write(addr, data, size);
if (addr < sizeof(n->bar)) {
nvme_write_bar(n, addr, data, size);
diff --git a/hw/block/trace-events b/hw/block/trace-events
index 78d76b0a71c1..a104d7f4da80 100644
--- a/hw/block/trace-events
+++ b/hw/block/trace-events
@@ -80,8 +80,8 @@ pci_nvme_enqueue_event_noqueue(int queued) "queued %d"
pci_nvme_enqueue_event_masked(uint8_t typ) "type 0x%"PRIx8""
pci_nvme_no_outstanding_aers(void) "ignoring event; no outstanding AERs"
pci_nvme_enqueue_req_completion(uint16_t cid, uint16_t cqid, uint16_t status)
"cid %"PRIu16" cqid %"PRIu16" status 0x%"PRIx16""
-pci_nvme_mmio_read(uint64_t addr) "addr 0x%"PRIx64""
-pci_nvme_mmio_write(uint64_t addr, uint64_t data) "addr 0x%"PRIx64" data
0x%"PRIx64""
+pci_nvme_mmio_read(uint64_t addr, unsigned size) "addr 0x%"PRIx64" size %d"
+pci_nvme_mmio_write(uint64_t addr, uint64_t data, unsigned size) "addr
0x%"PRIx64" data 0x%"PRIx64" size %d"
pci_nvme_mmio_doorbell_cq(uint16_t cqid, uint16_t new_head) "cqid %"PRIu16"
new_head %"PRIu16""
pci_nvme_mmio_doorbell_sq(uint16_t sqid, uint16_t new_tail) "sqid %"PRIu16"
new_tail %"PRIu16""
pci_nvme_mmio_intm_set(uint64_t data, uint64_t new_mask) "wrote MMIO,
interrupt mask set, data=0x%"PRIx64", new_mask=0x%"PRIx64""
--
2.30.0
- [PATCH v2 00/12] hw/block/nvme: misc cmb/pmr patches and bump to v1.4, Klaus Jensen, 2021/01/18
- [PATCH v2 01/12] hw/block/nvme: add size to mmio read/write trace events,
Klaus Jensen <=
- [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Klaus Jensen, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Minwoo Im, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Klaus Jensen, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Minwoo Im, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Klaus Jensen, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Minwoo Im, 2021/01/18
- Re: [PATCH v2 02/12] hw/block/nvme: fix 64 bit register hi/lo split writes, Keith Busch, 2021/01/19
[PATCH v2 03/12] hw/block/nvme: indicate CMB support through controller capabilities register, Klaus Jensen, 2021/01/18