Re: [PATCH v3 7/9] hw/ppc/e500: Implement pflash handling

[Bernhard Beschow]

Am 16. Oktober 2022 14:15:09 UTC schrieb BALATON Zoltan <balaton@eik.bme.hu>:
>On Sun, 16 Oct 2022, Bernhard Beschow wrote:
>> Allows e500 boards to have their root file system reside on flash using
>> only builtin devices located in the eLBC memory region.
>> 
>> Note that the flash memory area is only created when a -pflash argument is
>> given, and that the size is determined by the given file. The idea is to
>> put users into control.
>> 
>> Signed-off-by: Bernhard Beschow <shentey@gmail.com>
>> ---
>> docs/system/ppc/ppce500.rst | 16 ++++++++++
>> hw/ppc/Kconfig              |  1 +
>> hw/ppc/e500.c               | 62 +++++++++++++++++++++++++++++++++++++
>> 3 files changed, 79 insertions(+)
>> 
>> diff --git a/docs/system/ppc/ppce500.rst b/docs/system/ppc/ppce500.rst
>> index ba6bcb7314..99d2c680d6 100644
>> --- a/docs/system/ppc/ppce500.rst
>> +++ b/docs/system/ppc/ppce500.rst
>> @@ -165,3 +165,19 @@ if “-device eTSEC” is given to QEMU:
>> .. code-block:: bash
>> 
>>   -netdev tap,ifname=tap0,script=no,downscript=no,id=net0 -device 
>> eTSEC,netdev=net0
>> +
>> +Root file system on flash drive
>> +-------------------------------
>> +
>> +Rather than using a root file system on ram disk, it is possible to have it 
>> on
>> +CFI flash. Given an ext2 image whose size must be a power of two, it can be 
>> used
>> +as follows:
>> +
>> +.. code-block:: bash
>> +
>> +  $ qemu-system-ppc{64|32} -M ppce500 -cpu e500mc -smp 4 -m 2G \
>
>We have qemu-system-ppc and qemu-system-ppc64 not qemu-system-ppc32 so maybe 
>qemu-system-ppc[64] even though that looks odd so maybe just qemu-system-ppc 
>and then people should know that ppc64 includes ppc config as well.

True. This naming is used elsewhere in this document, so we kept it consistent. 
I think that users will get it either way.

@Bin: Any thoughts?

Best regards,
Bernhard

>
>Regards,
>BALATON Zoltan
>
>> +      -display none -serial stdio \
>> +      -kernel vmlinux \
>> +      -drive if=pflash,file=/path/to/rootfs.ext2,format=raw \
>> +      -append "rootwait root=/dev/mtdblock0"
>> +
>> diff --git a/hw/ppc/Kconfig b/hw/ppc/Kconfig
>> index 791fe78a50..769a1ead1c 100644
>> --- a/hw/ppc/Kconfig
>> +++ b/hw/ppc/Kconfig
>> @@ -126,6 +126,7 @@ config E500
>>     select ETSEC
>>     select GPIO_MPC8XXX
>>     select OPENPIC
>> +    select PFLASH_CFI01
>>     select PLATFORM_BUS
>>     select PPCE500_PCI
>>     select SERIAL
>> diff --git a/hw/ppc/e500.c b/hw/ppc/e500.c
>> index 3e950ea3ba..23d2c3451a 100644
>> --- a/hw/ppc/e500.c
>> +++ b/hw/ppc/e500.c
>> @@ -23,8 +23,10 @@
>> #include "e500-ccsr.h"
>> #include "net/net.h"
>> #include "qemu/config-file.h"
>> +#include "hw/block/flash.h"
>> #include "hw/char/serial.h"
>> #include "hw/pci/pci.h"
>> +#include "sysemu/block-backend-io.h"
>> #include "sysemu/sysemu.h"
>> #include "sysemu/kvm.h"
>> #include "sysemu/reset.h"
>> @@ -267,6 +269,31 @@ static void sysbus_device_create_devtree(SysBusDevice 
>> *sbdev, void *opaque)
>>     }
>> }
>> 
>> +static void create_devtree_flash(SysBusDevice *sbdev,
>> +                                 PlatformDevtreeData *data)
>> +{
>> +    g_autofree char *name = NULL;
>> +    uint64_t num_blocks = object_property_get_uint(OBJECT(sbdev),
>> +                                                   "num-blocks",
>> +                                                   &error_fatal);
>> +    uint64_t sector_length = object_property_get_uint(OBJECT(sbdev),
>> +                                                      "sector-length",
>> +                                                      &error_fatal);
>> +    uint64_t bank_width = object_property_get_uint(OBJECT(sbdev),
>> +                                                   "width",
>> +                                                   &error_fatal);
>> +    hwaddr flashbase = 0;
>> +    hwaddr flashsize = num_blocks * sector_length;
>> +    void *fdt = data->fdt;
>> +
>> +    name = g_strdup_printf("%s/nor@%" PRIx64, data->node, flashbase);
>> +    qemu_fdt_add_subnode(fdt, name);
>> +    qemu_fdt_setprop_string(fdt, name, "compatible", "cfi-flash");
>> +    qemu_fdt_setprop_sized_cells(fdt, name, "reg",
>> +                                 1, flashbase, 1, flashsize);
>> +    qemu_fdt_setprop_cell(fdt, name, "bank-width", bank_width);
>> +}
>> +
>> static void platform_bus_create_devtree(PPCE500MachineState *pms,
>>                                         void *fdt, const char *mpic)
>> {
>> @@ -276,6 +303,8 @@ static void 
>> platform_bus_create_devtree(PPCE500MachineState *pms,
>>     uint64_t addr = pmc->platform_bus_base;
>>     uint64_t size = pmc->platform_bus_size;
>>     int irq_start = pmc->platform_bus_first_irq;
>> +    SysBusDevice *sbdev;
>> +    bool ambiguous;
>> 
>>     /* Create a /platform node that we can put all devices into */
>> 
>> @@ -302,6 +331,13 @@ static void 
>> platform_bus_create_devtree(PPCE500MachineState *pms,
>>     /* Loop through all dynamic sysbus devices and create nodes for them */
>>     foreach_dynamic_sysbus_device(sysbus_device_create_devtree, &data);
>> 
>> +    sbdev = SYS_BUS_DEVICE(object_resolve_path_type("", TYPE_PFLASH_CFI01,
>> +                                                    &ambiguous));
>> +    if (sbdev) {
>> +        assert(!ambiguous);
>> +        create_devtree_flash(sbdev, &data);
>> +    }
>> +
>>     g_free(node);
>> }
>> 
>> @@ -856,6 +892,7 @@ void ppce500_init(MachineState *machine)
>>     unsigned int pci_irq_nrs[PCI_NUM_PINS] = {1, 2, 3, 4};
>>     IrqLines *irqs;
>>     DeviceState *dev, *mpicdev;
>> +    DriveInfo *dinfo;
>>     CPUPPCState *firstenv = NULL;
>>     MemoryRegion *ccsr_addr_space;
>>     SysBusDevice *s;
>> @@ -1024,6 +1061,31 @@ void ppce500_init(MachineState *machine)
>>                                 pmc->platform_bus_base,
>>                                 &pms->pbus_dev->mmio);
>> 
>> +    dinfo = drive_get(IF_PFLASH, 0, 0);
>> +    if (dinfo) {
>> +        BlockBackend *blk = blk_by_legacy_dinfo(dinfo);
>> +        BlockDriverState *bs = blk_bs(blk);
>> +        uint64_t size = bdrv_getlength(bs);
>> +        uint64_t mmio_size = pms->pbus_dev->mmio.size;
>> +        PFlashCFI01 *pfl;
>> +
>> +        if (!is_power_of_2(size)) {
>> +            error_report("Size of pflash file must be a power of two.");
>> +            exit(1);
>> +        }
>> +
>> +        if (size > mmio_size) {
>> +            error_report("Size of pflash file must not be bigger than %" 
>> PRIu64
>> +                         " bytes.", mmio_size);
>> +            exit(1);
>> +        }
>> +
>> +        pfl = pflash_cfi01_register("e500.flash", size, blk, 64 * KiB, 2,
>> +                                    0x89, 0x18, 0x0000, 0x0, 1);
>> +        memory_region_add_subregion(&pms->pbus_dev->mmio, 0,
>> +                                    pflash_cfi01_get_memory(pfl));
>> +    }
>> +
>>     /*
>>      * Smart firmware defaults ahead!
>>      *
>>