Re: [PATCH v3 2/2] hw/ide/piix: Ignore writes of hardwired PCI command register bits

[Michael S. Tsirkin]

On Mon, Oct 24, 2022 at 09:46:19AM +0000, Lev Kujawski wrote:
> > I guess this cna work but what I had in mind is much
> > simpler. Add an internal property (name starting with "x-")
> > enabling the buggy behaviour and set it in hw compat array.
> > If set - do not touch the wmask register.
> >
> > post load hooks are harder to reason about.
> 
> Thanks again for the review and clarification, please find attached an
> updated patch.  My only concern with the internal property approach is
> a potential proliferation of similar boolean values if someone else
> encounters an incompatibility.

Yes they do tend to proliferate. We might drop some down the road
after the affected machine type is dropped.

>  I have not conducted a thorough audit
> of all the PIIX 3/4 IDE registers for hardwired bits (only what I
> encountered testing proprietary firmware - PCICMD), and I do not have
> access to my PIIX 3 system at the moment.
> 
> Kind regards,
> Lev Kujawski
> 
> Lev Kujawski (2):
>   qpci_device_enable: Allow for command bits hardwired to 0
>   hw/ide/piix: Ignore writes of hardwired PCI command register bits
> 
>  hw/core/machine.c        |  5 ++++-
>  hw/ide/piix.c            | 24 ++++++++++++++++++++++++
>  include/hw/ide/pci.h     |  1 +
>  tests/qtest/ide-test.c   |  1 +
>  tests/qtest/libqos/pci.c | 13 +++++++------
>  tests/qtest/libqos/pci.h |  1 +
>  6 files changed, 38 insertions(+), 7 deletions(-)
> 
> -- 
> 2.34.1